Package Characteristics
Parameter
Symbol Min. Typ. Max. Units
Test Conditions
Fig.
Note
Input-Output Momentary
Withstand Voltage
0710
7710
V
ISO
3750
3750
Vrms
RH ≤ 50%,
t = 1 min.,
TA = 25°C
8, 9,
10
Resistance
(Input-Output)
R
1012
0.6
Ω
V = 500 Vdc
8
I-O
I-O
Capacitance
C
I-O
pF
f = 1 MHz
(Input-Output)
Input Capacitance
C
I
3.0
11
Input IC Junction-to-Case
Thermal Resistance
-7710
-0710
θjci
145
160
°C/ W
Thermocouple
located at center
underside of package
Output IC Junction-to-Case
Thermal Resistance
-7710
-0710
θjco
PPD
140
135
Package Power Dissipation
150
mW
Notes:
1. The LED is ON when V is low and OFF
4. PWD is defined as | tPHL - tPLH| .
9. In accordance with UL1577, each HCPL-
0710 is proof tested by applying an
insulation test voltage ≥4500 VRMS for 1
second (leakage detection current limit, I
≤5 µA). Each HCPL-7710 is proof tested by
applying an insulation test voltage ≥ 4500 V
rms for 1 second (leakage detection current
limit, II-O ≤ 5 µA).
I
when V is high.
%PWD (percent pulse width distortion) is
equal to the PWD divided by pulse width.
5. tPSK is equal to the magnitude of the worst
case difference in tPHL and/ or tPLH that will
be seen between units at any given
temperature within the recommended
operating conditions.
I
2. tPHL propagation delay is measured from
the 50% level on the falling edge of the V
signal to the 50% level of the falling edge
I
I-O
of the V signal. tPLH propagation delay is
O
measured from the 50% level on the rising
edge of the V signal to the 50% level of the
I
rising edge of the V signal.
6. CMH is the maximum common mode
voltage slew rate that can be sustained
10. The Input-Output Momentary Withstand
Voltage is a dielectric voltage rating that
should not be interpreted as an input-output
continuous voltage rating. For the
O
3. Mimimum Pulse Width is the shortest
pulse width at which 10% maximum, Pulse
Width Distortion can be guaranteed.
Maximum Data Rate is the inverse of
Minimum Pulse Width. Operating the
HCPL-x710 at data rates above 12.5 MBd is
possible provided PWD and data
dependent jitter increases and relaxed
noise margins are tolerable within the
application. For instance, if the maximum
allowable variation of bit width is 30%, the
maximum data rate becomes 37.5 MBd.
Please note that HCPL-x710 performances
above 12.5 MBd are not guaranteed by
Hewlett-Packard.
while maintaining V > 0.8 VDD2. CML is the
O
maximum common mode voltage slew rate
that can be sustained while maintaining V
< 0.8 V. The common mode voltage slew
rates apply to both rising and falling
common mode voltage edges.
continuous voltage rating refer to your
equipment level safety specification or
Agilent Application Note 1074 entitled
“Optocoupler Input-Output Endurance
Voltage.”
O
7. Unloaded dynamic power dissipation is
calculated as follows: CPD * VDD2 * f + IDD
*
11. C is the capacitance measured at pin 2 (V).
I
I
VDD, where f is switching frequency in
MHz.
8. Device considered a two-terminal device:
pins 1, 2, 3, and 4 shorted together and
pins 5, 6, 7, and 8 shorted together.
2.2
29
27
25
23
5
0 °C
25 °C
85 °C
2.1
2.0
1.9
0 °C
25 °C
85 °C
4
3
2
1
0
T
T
PLH
PHL
21
19
17
15
1.8
1.7
1.6
0
1
2
3
4
5
4.5
4.75
5
5.25
5.5
0
10 20 30 40 50 60 70 80
(C)
V (V)
V
(V)
T
I
DD1
A
Figure 1. Typical output voltage vs. input
voltage.
Figure 2. Typical input voltage switching
threshold vs. input supply voltage.
Figure 3. Typical propagation delays vs.
temperature.
7