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HCPL-7100 参数 Datasheet PDF下载

HCPL-7100图片预览
型号: HCPL-7100
PDF下载: 下载PDF文件 查看货源
内容描述: 高速CMOS光电耦合器 [High Speed CMOS Optocouplers]
分类和应用: 光电
文件页数/大小: 14 页 / 227 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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H
High Speed CMOS
Optocouplers
Technical Data
HCPL-7100
HCPL-7101
Features
• 1
µ
m CMOS IC Technology
• Compatibility with All +5 V
CMOS and TTL Logic
Families
• No External Components
Required for Logic Interface
• High Speed: 15 MBd
(HCPL-7100) and 50 MBd
(HCPL-7101) Guaranteed
• Low Power Consumption
• Safety Approvals
UL 1577 (3750 Vac/1 Min)
VDE 0884 (V
IORM
= 848
V
peak
)
CSA
• 3-State Output
• 3750 Vac/1 Minute Dielectric
Withstand
• High Common Mode
Transient Immunity
Description
The HCPL-7100/7101 optocoup-
ler combines the latest CMOS IC
technology, a new high-speed
high-efficiency AlGaAs LED, and
an optimized light coupling system
to achieve outstanding perfor-
mance with very low power
consumption. It requires only two
bypass capacitors for complete
CMOS/TTL compatibility.
Basic building blocks of the
HCPL-7100/7101 are a CMOS
LED driver IC, an AlGaAs LED,
and a CMOS detector IC. A CMOS
or TTL logic input signal controls
the LED driver IC which supplies
current to the LED. The detector
IC incorporates an integrated
photodiode, a high-speed trans-
impedance amplifier and a voltage
comparator with hysteresis. The
3-state output is CMOS and TTL
compatible and is controlled by
the output enable pin, V
OE
.
The HCPL-7100/7101 consumes
very little power, due to the
CMOS IC technology and the light
coupling system. The entire
optocoupler typically uses only 10
mA of supply current, including
the LED current.
World-wide safety approval and
3750 Vac/1 minute dielectric with-
stand is achieved with our
patented “light-pipe” optocoupler
packaging technology.
The HCPL-7100/7101 provides he
user with an easy-to-use CMOS or
TTL compatible optocoupler
ideally suited for a variety of
applications where high speed
and low power consumption are
desired.
Applications
• Multiplexed Data
Transmission
• Computer-Peripheral
Interface
• Microprocessor System
Interface
• Digital Isolation for A/D,
D/A Conversion
• Instrument Input/Output
Isolation
• Motor Control
• Power Inverter
Schematic
TRUTH TABLE
(POSITIVE LOGIC)
INPUT
H
L
H
L
ENABLE
H
H
L
L
OUTPUT
Z
Z
H
L
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
1-402
5965-3578E