10
PULSE
GENERATOR
Z
O
= 50
Ω
t
r
= t
f =
5 ns
C
L= 15 pF INCLUDING PROBE
AND JIG CAPACITANCE.
V
CC
D.U.T.
V
CC
V
O
D
1
+5 V
S1
619
Ω
D
1-4
ARE 1N916 OR 1N3064
I
F
V
O
C
L
V
E
GND
INPUT V
O
MONITORING
NODE
D
2
5 KΩ
D
3
D
4
S2
Figure 8. Test Circuit for t
PHZ
, t
PZH
, t
PLZ
, and t
PZL
.
A
D.U.T.
B
R
IN
V
CC
V
O
V
CC
OUTPUT V
O
MONITORING
NODE
V
E
V
FF
GND
0.1 µF
BYPASS
V
CM
+
–
PULSE GEN.
*SEE NOTE 6.
Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.
V
CC1
(+5 V)
665
Ω
D.U.T.
V
CC
DATA
INPUT
V
O
TTL OR
LSTTL
V
CC2
(4.5 TO 20 V)
R
L
CMOS
DATA
OUTPUT
V
CC1
(+5 V)
750
Ω
D.U.T.
V
CC
DATA
INPUT
TTL OR
LSTTL
V
E
GND
TOTEM
POLE
OUTPUT
GATE
V
CC2
1
5V
10 V
15 V
20 V
R
L
1.1 K
2.37 K
3.83 K
5.11 K
2
TOTEM
POLE
OUTPUT
GATE
GND
Figure 10. LSTTL to CMOS Interface Circuit.
Figure 11. Recommended LED Drive Circuit.
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
