Notes:
1.
≤
1
µs
pulse width, 300 pps.
2. Derate linearly above 70°C free air
temperature at a rate of 1.6 mW/
°C.
Proper application of the derating
factors will prevent IC junction
temperatures from exceeding 125°C
for ambient temperatures up to 85°C.
3. Derate linearly above 70°C free air
temperature at a rate of 3.8 mW/
°C.
4. Derate linearly above 70°C free air
temperature at a rate of 4.6 mW/
°C.
5. Duration of output short circuit time
shall not exceed 10 ms.
6. The device is considered a two
terminal device, pins 1, 2, 3, and 4
are connected together and pins 5, 6,
7, and 8 are connected together.
7. The t
PLH
propagation delay is
measured from the 10 mA level on
the leading edge of the input pulse to
the 1.3 V level on the leading edge of
the output pulse.
8. The t
PHL
propagation delay is
measured from the 10 mA level on
the trailing edge of the input pulse to
the 1.3 V level on the trailing edge of
the output pulse.
9. The rise time, t
r
, is measured from the
10% to the 90% level on the rising
edge of the output logic pulse.
10. The fall time, t
f
, is measured from the
90% to the 10% level on the falling
edge of the output logic pulse.
11. Common mode transient immunity in
the logic high level is the maximum
(negative) dV
CM
/dt on the trailing
edge of the common mode pulse,
V
CM
, which can be sustained with the
output voltage in the logic high state
(i.e., V
O
≥
2 V).
12. Common mode transient immunity in
the logic low level is the maximum
(positive) dV
CM
/dt on the leading
edge of the common mode pulse,
V
CM
, which can be sustained with the
output voltage in the logic low state
(i.e., V
O
≤
0.8 V).
13. Use of a 0.1
µF
bypass capacitor
connected between pins 5 and 8 is
recommended.
14. In accordance with UL 1577, each
optocoupler momentary withstand is
proof tested by applying an insulation
test voltage
≥
3000 V rms for 1
second (leakage detection current
limit, I
i-o
≤
5
µA).
10
I
I
– INPUT SWITCHING THRESHOLD – mA
8
6
I
HYS
4
2
0
-50
-25
0
25
50
75
100
T
A
– AMBIENT TEMPERATURE –°C
Figure 2. Typical Output Voltage vs.
Loop Current.
Figure 3. Typical Current Switching
Threshold vs. Temperature.
Figure 4. Typical Input Loop Voltage
vs. Input Current.
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-60
-40
-20
0
20
40
60
80
100
V
CC
= 4.5 V
I
I
= 3 mA
I
O
= 6.4 mA
I
OH
– HIGH LEVEL OUTPUT CURRENT – mA
2.8
V
OL
– LOW LEVEL OUTPUT VOLTAGE – V
1.0
0
-1
-2
-3
-4
-5
-6
-7
-8
-60
V
O
= 2.4 V
V
O
= 2.7 V
V
CC
= 4.5 V
I
I
= 12 mA
V
I
– LOOP VOLTAGE – VOLTS
2.6
I
I
= 20 mA
I
I
= 12 mA
2.4
2.2
-50
-25
0
25
50
75
100
-40
-20
0
20
40
60
80
100
T
A
– AMBIENT TEMPERATURE –°C
T
A
– TEMPERATURE –°C
T
A
– TEMPERATURE –°C
Figure 5. Typical Input Voltage vs.
Temperature.
Figure 6. Typical Logic Low Output
Voltage vs. Temperature.
Figure 7. Typical Logic High Output
Current vs. Temperature.
1-379
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
