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HCPL-3140 参数 Datasheet PDF下载

HCPL-3140图片预览
型号: HCPL-3140
PDF下载: 下载PDF文件 查看货源
内容描述: 0.4安培输出电流IGBT栅极驱动光电耦合器 [0.4 Amp Output Current IGBT Gate Drive Optocoupler]
分类和应用: 栅极光电输出元件双极性晶体管栅极驱动
文件页数/大小: 16 页 / 252 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Esw – ENERGY PER SWITCHING CYCLE – µJ
Selecting the Gate Resistor (Rg)
Step 1:
Calculate R
g
minimum from the I
OL
peak specification. The IGBT
and Rg in Figure 19 can be analyzed as a simple RC circuit with a
voltage supplied by the HCPL-3140/HCPL-0314.
Rg
=
V
CC
– V
OL
I
OLPEAK
24
V
– 5
V
0.6A
4.0
Qg = 50 nC
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
20
40
60
80
100
Qg = 100 nC
Qg = 200 nC
Qg = 400 nC
= 32
The V
OL
value of 5 V in the previous equation is the V
OL
at the peak
current of 0.6A. (See Figure 6).
Step 2:
Check the HCPL-3140/HCPL-0314 power dissipation and
increase Rg if necessary. The HCPL-3140/HCPL-0314 total power
dissipation (P
T
) is equal to the sum of the emitter power (P
E
) and the
output power (P
O
).
P
T
= P
E
+ P
O
P
E
= I
F
V
F
Duty Cycle
P
O
= P
O(BIAS)
+ P
O(SWITCHING)
= I
CC
V
CC
+ E
SW
(Rg,Qg)
f
= (I
CCBIAS
+
K
ICC
Qg
f)
V
CC
+
E
SW
(Rg,Qg)
f
where
K
ICC
Qg
f
is the increase in I
CC
due to switching and K
ICC
is a
constant of 0.001 mA/(nC*kHz). For the circuit in Figure 19 with I
F
(worst case) = 10 mA, Rg = 32
Ω,
Max Duty Cycle = 80%,
Qg = 100 nC, f = 20 kHz and T
AMAX
= 85°C:
P
E
= 10
mA
1.8
V
0.8 = 14
mW
P
O
= (3
mA
+ (0.001
mA/(nC
kHz))
20
kHz
100
nC)
24
V
+
0.4
µ
J
20
kHz
= 80
mW
< 260
mW
(P
O(MAX)
@ 85°C)
The value of 3 mA for I
CC
in the previous equation is the max. I
CC
over
entire operating temperature range.
Since P
O
for this case is less than P
O(MAX)
, Rg = 32
is alright for the
power dissipation.
Rg – GATE RESISTANCE –
Figure 20. Energy Dissipated in the
HCPL-0314 and for Each IGBT Switching
Cycle.
L
ED Drive Circuit Considerations for
Ultra High CMR Performance
Without a detector shield, the
dominant cause of optocoupler
CMR failure is capacitive
coupling from the input side of
the optocoupler, through the
package, to the detector IC
as shown in Figure 21. The
HCPL-3140/HCPL-0314 improves
CMR performance by using a
detector IC with an optically
transparent Faraday shield, which
diverts the capacitively coupled
current away from the sensitive
IC circuitry. However, this shield
does not eliminate the capacitive
coupling between the LED and
opto-coupler pins 5-8 as shown in
Figure 22. This capacitive
coupling causes perturbations in
the LED current during common
mode transients and becomes the
major source of CMR failures for
a shielded optocoupler. The main
design objective of a high CMR
LED drive circuit becomes
keeping the LED in the proper
state (on or off ) during common
mode transients. For example,
the recommended application
circuit (Figure 19), can achieve
10 kV/µs CMR while minimizing
component complexity.
Techniques to keep the LED in
the proper state are discussed in
the next two sections.
12