10
provides guaranteed minimum
common mode immunity of
100 V/µs while maintaining the
2:1 dynamic range of I
F
.
A recommended layout for use
with an internal 1000
Ω
resistor
or an external pull-up resistor
and required V
CC
bypass capaci-
tor is given in Figure 19. V
CC1
is
used with an external pull-up
resistor for output voltage levels
(V
O
) greater than or equal to 5 V.
As illustrated in Figure 19, an
HCPL-2300/
HCPL-0300
optional V
CC
and GND trace can
be located between the input
and the output leads of the
HCPL-2300/HCPL-0300 to
provide additional noise
immunity at the compromise of
insulation capability (V
I-O
).
Figure 12. Recommended Shunt Drive Circuit for Interfacing between TTL/LSTTL/CMOS Logic Systems.
HCPL-2300/
HCPL-0300
HCPL-2300/
HCPL-0300
Figure 13. Active CMOS Series Drive Circuit.
Figure 14. Series Drive from Open Collector TTL/LSTTL
Units.
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
