OUTPUT POWER – P
S
, INPUT CURRENT – I
S
HCPL-2200
A
B
1
2
3
V
CC
OUTPUT V
O
MONITORING
NODE
0.1 µF
BYPASS
800
700
600
500
400
300
200
100
0
0
HCPL-2219 OPTION 060 ONLY
P
S
(mW)
I
S
(mA)
V
CC 8
7
6
5
R
IN
V
FF
4
GND
V
CM
–
PULSE GENERATOR +
V
CM
0V
V
OH
OUTPUT
V
O
V
OL
* SEE NOTE 6.
50 V
SWITCH AT A: I
F
= 1.6 mA
V
O
(MIN.)*
SWITCH AT B: I
F
= 0 mA
V
O
(MAX.)*
25
50
75 100 125 150 175 200
T
S
– CASE TEMPERATURE – °C
Figure 12. Thermal Derating Curve,
Dependence of Safety Limiting Value
with Case Temperature per
VDE 0884.
Figure 11. Test Circuit for Common Mode Transient Immunity and Typical
Waveforms.
V
CC1
(+5 V)
V
CC1
(+5 V)
1.1
kΩ
120 pF
HCPL-2200
1
2
DATA
INPUT
TOTEM
POLE
OUTPUT
GATE
1
2
V
CC2
(+5 V)
DATA
OUTPUT
120 pF (OPTIONAL*)
1.1
kΩ
1
2
HCPL-2200
V
CC
8
7
6
GND
5
V
CC2
(4.5 TO 20 V)
V
CC
8
7
6
R
L
CMOS
DATA
OUTPUT
3
TTL OR
LSTTL
4
GND
5
UP TO 16
LSTTL
LOADS
OR 4 TTL
LOADS
DATA
INPUT
TOTEM
POLE
OUTPUT
GATE
1
3
TTL OR
LSTTL
4
V
CC2
5V
10 V
15 V
20 V
R
L
1.1 K
2.37 K
3.83 K
5.11 K
2
Figure 13. Recommended LSTTL to LSTTL Circuit.
Figure 14. LSTTL to CMOS Interface Circuit.
V
CC
(+5 V)
V
CC1
(+5 V)
1.1 kΩ
1
DATA
INPUT
TTL OR
LSTTL
D1
3
4
GND
6
5
2
HCPL-2200
V
CC
8
7
120 pF (OPTIONAL*)
1.1
kΩ
1
2
4.7 kΩ
HCPL-2200
V
CC
8
7
6
GND
5
DATA
INPUT
OPEN
COLLECTOR
GATE
3
TTL OR
LSTTL
4
D1 (1N4150) REQUIRED FOR
ACTIVE PULL-UP DRIVER.
Figure 15. Recommended LED Drive Circuit.
Figure 16. Series LED Drive with Open Collector Gate
(4.7 k
Ω
Resistor Shunts I
OH
from the LED).
*The 120 pF capacitor may be omitted in applications where 500 ns propagation delay is sufficient.
1-130
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
