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AT-32011 参数 Datasheet PDF下载

AT-32011图片预览
型号: AT-32011
PDF下载: 下载PDF文件 查看货源
内容描述: 低电流,高性能硅NPN双极晶体管 [Low Current, High Performance NPN Silicon Bipolar Transistor]
分类和应用: 晶体晶体管
文件页数/大小: 10 页 / 125 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Low Current, High Performance
NPN Silicon Bipolar Transistor
Technical Data
AT-32011
AT-32033
Features
• High Performance Bipolar
Transistor Optimized for
Low Current, Low Voltage
Operation
• 900 MHz Performance:
AT-32011: 1 dB NF, 14 dB G
A
AT-32033: 1 dB NF, 12.5 dB G
A
• Characterized for End-Of-
Life Battery Use (2.7 V)
• SOT-23 and SOT-143 SMT
Plastic Packages
• Tape-And-Reel Packaging
Option Available
[1]
Description
Hewlett Packard’s AT-32011 and
AT-32033 are high performance
NPN bipolar transistors that have
been optimized for maximum f
t
at
low voltage operation, making
them ideal for use in battery
powered applications in wireless
markets. The AT-32033 uses the
3 lead SOT-23, while the AT-320 11
places the same die in the higher
performance 4 lead SOT-143. Both
packages are industry standard,
and compatible with high volume
surface mount assembly
techniques.
The 3.2 micron emitter-to-emitter
pitch and reduced parasitic design
of these transistors yields
extremely high performance
products that can perform a
multiplicity of tasks. The
20 emitter finger interdigitated
geometry yields an easy to match
to and extremely fast transistor
with moderate power, low noise
resistance, and low operating
currents.
Optimized performance at 2.7 V
makes these devices ideal for use
in 900 MHz, 1.8 GHz, and 2.4 GHz
battery operated systems as an
LNA, gain stage, buffer, oscillator,
or active mixer. Typical amplifier
designs at 900 MHz yield 1.2 dB
noise figures with 12 dB or more
associated gain at a 2.7 V, 2 mA
bias, with noise performance
being relatively insensitive to
input match. High gain capability
at 1 V, 1 mA makes these devices a
good fit for 900 MHz pager
applications. Voltage breakdowns
are high enough for use at 5 volts.
The AT-3 series bipolar transistors
are fabricated using an optimized
version of Hewlett Packard’s
10 GHz f
t
, 30 GHz f
MAX
Self-
Aligned-Transistor (SAT) process.
The die are nitride passivated for
surface protection. Excellent
device uniformity, performance
and reliability are produced by the
use of ion-implantation, self-
alignment techniques, and gold
metalization in the fabrication of
these devices.
Outline Drawing
EMITTER COLLECTOR
320
BASE
EMITTER
SOT-143 (AT-32011)
COLLECTOR
320
BASE
EMITTER
SOT-23 (AT-32033)
Note:
1. Refer to “Tape-and-Reel Packaging for Semiconductor Devices.”
4-53
5965-8920E