18
V
V
V
V
V
V
V
V
E
IN+
IN-
E
IN+
IN-
0.1
µF
0.1
µF
0.1
µF
–
STROBE
8 V
V
V
LED2+
+
LED2+
+
+
–
–
30 V
5 V
5 V
DESAT
DESAT
CC1
CC1
0.1
µF
GND1
V
GND1
V
V
HIGH
CC2
CC2
IN
TO LOW
3 k
RESET
FAULT
V
C
RESET
FAULT
V
C
R
AMP
0.1
µF
0.1
µF
V
OUT
+
V
FAULT
–
V
V
OUT
OUT
30 V
3 k
10 Ω
10 Ω
V
V
V
V
V
V
V
V
LED1+
LED1-
EE
EE
LED1+
LED1-
EE
EE
10
nF
10
nF
Figure 48. t
Test Circuit.
Figure 49. UVLO Delay Test Circuit.
RESET(FAULT)
1
2
3
4
5
6
7
8
V
V
V
V
16
15
DESAT 14
IN+
IN-
E
V
5 V
LED2+
1
2
3
4
5
6
7
8
V
V
V
V
16
15
IN+
IN-
E
25 V
CC1
0.1
µF
V
5 V
LED2+
GND1
V
13
12
11
10
9
CC2
0.1 µF
3 kΩ
DESAT 14
CC1
RESET
FAULT
V
C
25 V
0.1
µF
GND1
V
13
12
11
10
9
CC2
SCOPE
V
OUT
0.1 µF
3 kΩ
RESET
FAULT
V
C
10 Ω
10 nF
V
V
V
V
LED1+
LED1
EE
EE
100 pF
SCOPE
V
OUT
10 Ω
750 Ω
V
V
V
V
LED1+
LED1
EE
EE
100 pF
–
10 nF
+
9 V
V
V
Cm
Cm
Figure 50. CMR Test Circuit, LED2 off.
Figure 51. CMR Test Circuit, LED2 on.
1
2
3
4
5
6
7
8
V
V
V
V
16
15
1
2
3
4
5
6
7
8
V
V
V
V
16
15
DESAT 14
IN+
IN-
E
IN+
IN-
E
V
V
5 V
5 V
LED2+
LED2+
DESAT 14
25 V
25 V
CC1
CC1
0.1
µF
0.1
µF
0.1 µF
GND1
V
13
12
11
10
9
GND1
V
13
12
11
10
9
CC2
CC2
0.1 µF
3 kΩ
3 kΩ
RESET
FAULT
V
RESET
FAULT
V
C
C
SCOPE
10 nF
V
V
SCOPE
OUT
OUT
10 Ω
100
pF
100 pF
V
V
V
V
10 Ω
LED1+
EE
LED1+
EE
V
V
V
V
EE
LED1
EE
LED1
10 nF
V
V
Cm
Cm
Figure 52. CMR Test Circuit, LED1 off.
Figure 53. CMR Test Circuit, LED1 on.