3
Functional Diagrams
16 pin DIP
Through Hole
4 Channels
8 pin DIP
Through Hole
1 Channel
8 pin DIP
Through Hole
2 Channels
16 pin Flat Pack
Unformed Leads
4 Channels
20 Pad LCCC
Surface Mount
2 Channels
15
V
CC2
1
V
8
1
V
8
CC
CC
1
16
1
16
19
20
13
12
V
O2
V
O1
GND
2
3
4
7
6
5
2
2
3
4
7
6
5
V
15
14
13
2
3
4
V
15
14
13
2
3
4
CC
CC
V
V
V
CC1
10
OUT
O2
2
3
V
O1
V
V
V
V
V
V
V
V
O1
O2
O3
O4
O1
O2
O3
O4
GND
1
GND
GND
7
8
5
12
5
12
6
7
8
11
10
9
6
7
8
11
10
9
GND
GND
Note: All DIP and flat pack devices have common VCC and ground. LCCC (leadless ceramic chip carrier) package has isolated channels
with separate VCC and ground connections.
Outline Drawings
16 Pin DIP Through Hole, 4 Channels
20.06 (0.790)
20.83 (0.820)
8.13 (0.320)
MAX.
0.89 (0.035)
1.65 (0.065)
4.45 (0.175)
MAX.
0.51 (0.020)
MIN.
3.81 (0.150)
MIN.
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
Leaded Device Marking
Leadless Device Marking
Agilent DESIGNATOR
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
A QYYWWZ
XXXXXX
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
DSCC SMD*
DSCC SMD*
Agilent CAGE CODE*
Agilent DESIGNATOR
Agilent P/N
PIN ONE/
ESD IDENT
COUNTRY OF MFR.
Agilent P/N
DSCC SMD*
DSCC SMD*
PIN ONE/
XXXX
XXXXXX
•
COUNTRY OF MFR.
Agilent CAGE CODE*
50434
XXX 50434
•
ESD IDENT
*QUALIFIED PARTS ONLY
*QUALIFIED PARTS ONLY