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16900 参数 Datasheet PDF下载

16900图片预览
型号: 16900
PDF下载: 下载PDF文件 查看货源
内容描述: 逻辑分析仪 [Logic Analyzer]
分类和应用:
文件页数/大小: 35 页 / 1054 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Logic Analyzer Selection Guide for 16900 Series Mainframes  
Agilent Model Number  
16910A/16911A  
102/68  
16950B/16951B  
16760A  
34  
Channels per module  
68  
Maximum channels on  
single time base  
510/340  
340  
170  
Timing Mode  
High-speed timing zoom [1]  
4 GHz (250 ps) with 64 K depth  
1.0 GHz (1 ns)  
4 GHz (250 ps) with 64 K depth  
1.2 GHz (833 ps)  
N/A  
Maximum timing sample  
rate: half channel mode  
800 MHz  
Maximum timing sample  
rate: full channel mode  
500 MHz (2.0 ns)  
500 MHz (2.0 ns)  
600 MHz (1.67 ns)  
600 MHz (1.67 ns)  
800 MHz  
400 MHz  
Transitional timing  
State Mode  
Maximum state clock rate  
450 MHz with option 500,  
250 MHz with option 250  
667 MHz  
800 Mb/s (full channel),  
1.5 Gb/s (half channel)  
Maximum state data rate  
500 Mb/s with option 500,  
250 Mb/s with option 250  
667 Mb/s (DDR)  
1066 Mb/s (Dual Sample)  
1.5 Gb/s  
Setup/hold window  
Adjustment resolution  
1.5 ns  
80 ps typical  
1 ns (600 ps typical),  
80 ps typical  
1 ns  
10 ps  
State clock, data rate  
(upgradeable)  
Yes (Agilent E5865A for 16910A) No  
(Agilent E5866A for 16911A)  
No  
Automated threshold/sample  
position, Simultaneous eye  
diagrams, all channels  
Yes  
Yes  
Yes  
Memory Depth [2]  
256 M  
64 M  
32 M  
16 M  
4 M  
16951B  
16950B, Option 064  
16950B, Option 032  
16950B, Option 016  
16950B, Option 004  
16950B, Option 001  
16760A  
Option 032  
Option 016  
Option 004  
Option 001  
Option 256  
1 M  
256 K  
Memory depth  
(upgradeable)  
Yes (Agilent E5865A for 16910A) Yes (Agilent E5875A)  
(Agilent E5866A for 16911A)  
64 M standard  
Other  
Supported signal types  
Probe compatibility [3]  
Voltage threshold  
Threshold Accuracy  
Single-ended  
Single-ended and differential  
Single-ended and differential  
90-pin cable connector  
40-pin cable connector  
–5 V to 5 V (10 mV increments)  
50 mV ꢀ 1ꢁ of setting  
90-pin cable connector  
–3 V to 5 V (10 mV increments)  
30 mV 2ꢁ of setting  
–3 V to 5 V (10 mV increments)  
(30 mV ꢀ 1ꢁ of setting)  
[1] All channels, all the time, simultaneous state and timing through same probe.  
[2] Specify desired memory depth using available options.  
[3] Probes are ordered separately. Please specify probes when ordering to ensure the correct connection between your logic analyzer and the device under test.  
2