Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
Input/Output Buffer Measurement Conditions
V
CC
GND
1 k
Ω
TO THE OUTPUT UNDER TEST
50 pF
TO THE OUTPUT UNDER TEST
50 pF
A. Load Used to Measure Propagation Delay
B. Load Used to Measure Rising/Falling Edges
Note: Switch to VDD for TPLZ/TPZL; switch to GND for TPHZ/TPZH.
5-3234(F)
Figure 89. ac Test Loads
ts[i]
PAD
OUT
out[i]
ac TEST LOADS (SHOWN ABOVE)
VDD
VDD/2
VSS
out[i]
PAD
OUT
1.5 V
0.0 V
TPLL
TPHH
5-3233.a(F)
Figure 90. Output Buffer Delays
PAD
IN
in[i]
3.0 V
PAD IN 1.5 V
0.0 V
VDD
in[i] VDD/2
VSS
TPLL
TPHH
5-3235(F)
Figure 91. Input Buffer Delays
Lucent Technologies Inc.
143
AGERE [ AGERE SYSTEMS ]
