Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
FPGA Configuration Modes (continued)
ENABLE MICROPROCESSOR
INTERFACE IN USER MODE
SET READBACK ADDRESS
WRITE RD_CFG TO 0
IN CONTROL REGISTER 1
READ STATUS REGISTER
DATA_RDY = 1?
NO
YES
READ DATA REGISTER
NO
ERROR
DATA = 0xFF?
YES
READ DATA REGISTER
NO
ERROR
DATA = 0xFF?
YES
READ DATA REGISTER
NO
START OF FRAME
FOUND?
ERROR
YES
READ UNTIL END OF FRAME
WRITE RD_CFG
YES
NO
FINISHED
READBACK?
TO 1 IN
CONTROL
REGISTER 1
STOP
5-5764(F)
Figure 60. Readback Through MPI
96
Lucent Technologies Inc.