L9215A/G
Short-Loop Sine Wave Ringing SLIC
Data Sheet
September 2001
Architecture Diagram
AGND VCC BGND VBAT2 VBAT1
VPROG
NSTAT
RTFLT DCOUT
VREF
CURRENT
LIMIT
RING
TRIP
AND
VITR
POWER
INRUSH
CONTROL
B = 20
LOOP
CLOSURE
AAC
1.5 V
BAND-GAP
COMMON-
MODE
CURRENT
DETECTOR
ICM
REFERENCE
TXI
ITR
VITR
RECTIFIER
X1
TRGDET
–
(ITR/306)
OUT
AX
VTX
CF2
OVH
CF1
VREF
+
–
+
RFT
PT
+1
18 Ω
ITR
X1
VREG
TIP/RING
CURRENT
SENSE
FB2
FB1
–
RCVN
RCVP
ITR
+
–
GAIN
RFR
PR
–1
+
ac INTERFACE
18 Ω
9215A GAIN = 4
9215G GAIN = 1
VREG
PPM
2x
PARALLEL
DATA
INTERFACE
RINGING
27.5x
RINGIN
PPMIN
BR B0 B1 B2
12-3530.g (F)
Figure 1. Architecture Diagram
Agere Systems Inc.
7
AGERE [ AGERE SYSTEMS ]
