Data Sheet
May 2001
L8576B Dual Ringing SLIC
To determine the low-pass pole:
Applications (continued)
Power Ringing (continued)
Power Ringing Load
1
f(Hz) = ----------------------------------------------
2π(RTFLT)(CRT)
Using the recommended 383 kΩ RTFLT resistor and
the 0.1 µF CRT capacitor, the low-pass pole is set at
4.15 Hz.
Telcordia GR-909 specifies that a minimum 40 Vrms
must be delivered to a 5 REN ringing load of 1386 Ω +
40 µF. For 5 REN load, it is recommended that VBAT be
set to –68.5 Vdc. During the power ring state, the dc
current limit is automatically boosted by a factor of 3.5
over the current limit set by resistor RPROG. Both of
these factors are necessary to ensure delivery of
40 Vrms to the North American 5 REN ringing load of
1386 Ω + 40 µF.
The loop current at ring trip is given by:
RTTH
ILOOP(TRIP) = 7.76 mA --------------
RGX2
Using the recommended 52.3 kΩ RTTH resistor and the
7.5 kΩ RGX2 resistor in a 20 Hz ringing application, the
ring trip threshold current is set for 54 mA.
Ring Trip
Reference Design for ISDN TA Applications
Ring trip is accomplished by filtering the voltage seen
at node DCOUT and applying it to the integrated ring trip
comparator. DCOUT is a voltage proportional to the tip/
ring current, and under short dc loop conditions, on-
hook ringing current and off-hook current provide suffi-
cient voltage differential at DCOUT to distinguish that a
ring trip condition has occurred. The ring trip compara-
tor threshold is set via a resistor between the ring trip
comparator and DCOUT.
For a complete reference design, please refer to the
POTS for ISDN, WLL, and FITL/FITH Applications,
Featuring Ringing SLIC Solutions Application Note,
which provides a detailed discussion of the reference
design functionality. The design presented utilizes a dc
to dc converter and requires only a +5 V and a +12 V
supply to operate. The schematic in Figure 2 of this
document portrays the SLIC and codec portions of that
design.
The output of NSTAT is automatically set to detect ring
trip during the balanced ring mode. During quiet inter-
vals of ringing, the output of NSTAT is automatically
determined by the loop closure detector.
ac Design
There are four key ac design parameters. Termination
impedance is the impedance looking into the 2-wire
port of the line card. It is set to match the impedance of
the telephone loop in order to minimize signal reflec-
tions back to the telephone set. Transmit gain is mea-
sured from the 2-wire port to the PCM highway, while
receive gain is measured from the PCM highway to
the 2-wire port or telephone loop. Finally, the hybrid
balance circuit cancels the unwanted amount of the
received signal that appears at the transmit port.
Refer to Figure 2 for the following discussion.
Capacitor CRT in conjunction with resistor RTFLT form a
single-pole, low-pass filter that smooths the voltage
seen at DCOUT. The pole of the filter will influence both
the ripple seen at DCOUT and the speed of the transi-
tion of the voltage at DCOUT from the pretrip to the
tripped level.
Agere Systems Inc.
19
AGERE [ AGERE SYSTEMS ]
