Data Sheet
October 2001
Dual Differential Transceivers
BTK1A and BTM1A
Features
Driver Features
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Description
The BTK1A and BTM1A devices are dual differential
transceiver circuits that transmit and receive digital
data over balanced transmission lines and are
compatible with Agere Systems Inc. quad differential
drivers and receivers. The dual drivers translate input
TTL logic levels to differential pseudo-ECL output
levels. The dual receivers convert differential input
logic levels to TTL output levels. Each driver/receiver
pair has its own common enable control allowing
serial data and a control clock to be transmitted and
received on a single integrated circuit. The BTK1A
transceiver requires the customer to supply
termination resistors on the circuit board. The
BTM1A transceiver has an internal resistor
termination for both the driver outputs (220
Ω
) and
receiver inputs (110
Ω
), eliminating the need for
external resistors on the circuit board when used with
100
Ω
impedance, twisted-pair (or flat) cable. These
transceivers replace the Agere 41 Series
transceivers.
The powerdown loading characteristics of the
receiver input circuit are approximately 8 k
Ω
relative
to the power supplies; hence, they will not load the
transmission line when the circuit is powered down.
For those circuits with termination resistors, the line
will remain impedance matched when the circuit is
powered down. The driver does not load the line
when it is powered down.
The packaging options that are available for the
dual differential transceivers include a 16-pin DIP; a
16-pin, J-lead SOJ; a 16-pin, gull-wing SOIC; and a
16-pin, narrow-body, gull-wing SOIC.
Two line drivers per package
Logic to convert TTL input logic levels to
differential, pseudo-emitter coupled logic (ECL)
output logic levels
No line loading when V
CC
= 0 V
High output driver for 50
Ω
loads
200 mA short-circuit current (typical)
2.0 ns maximum propagation delay
<0.2 ns output skew (typical)
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Receiver Features
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Two line receivers per package
High input impedance
≅
8 k
Ω
Logic that converts differential input logic levels to
transistor-transistor logic (TTL) output logic levels
4.0 ns maximum propagation delay
<0.20 V input sensitivity (typical)
−
1.2 V to
+
7.2 V common-mode range
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Common Device Features
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Common enable for each driver/receiver pair
Operating temperature range: –40
°
C to +125
°
C
(wider than the 41 Series)
Single 5.0 V
±
10% supply
400 Mbits/s maximum data rate
Meets enhanced small device interface (ESDI)
standards
Electrostatic discharge (ESD) performance better
than the 41 Series
Lower power requirement than the 41 Series
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AGERE [ AGERE SYSTEMS ]
