Data Sheet
January 1999
Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Timing Characteristics
Table 4. Timing Characteristics
(See Figures 2 and 3.)
For t
P1
and t
P2
propagation delays over the temperature range, see Figure 9.
Propagation delay test circuit connected to output (see Figure 6).
T
A
= –40 °C to +125 °C, V
CC
= 5 V
±
0.5 V.
Parameter
Propagation Delay:
Input High to Output
†
Input Low to Output
†
Capacitive Delay
Disable Time (either E1 or E2):
High-to-high Impedance
Low-to-high Impedance
Enable Time (either E1 or E2):
High Impedance to High
High Impedance to Low
Output Skew, |t
P1
– t
P2
|
|t
PHH –
t
PHL
|, |t
PLH
– t
PLL
|
Difference Between Drivers
Rise Time (20%—80%)
Fall Time (80%—20%)
Symbol
t
P1
*
t
P2
*
∆t
p
t
PHZ
t
PLZ
t
PZH
t
PZL
t
skew1
t
skew2
∆t
skew
t
tLH
t
tHL
Min
0.8
0.8
—
4
4
4
4
—
—
—
—
—
Typ
1.2
1.2
0.02
8
8
8
8
0.1
0.2
—
0.7
0.7
Max
2.0
2.0
0.03
12
12
12
12
0.3
0.5
0.3
2
2
Unit
ns
ns
ns/pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
* t
P1
and t
P2
are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 2).
† CL = 5 pF. Capacitor is connected from each output to ground.
Lucent Technologies Inc.
5
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