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ACT3492 参数 Datasheet PDF下载

ACT3492图片预览
型号: ACT3492
PDF下载: 下载PDF文件 查看货源
内容描述: MIL- STD- 1553B远程终端,总线控制器,或被动监控与混合状态字控制双路低功耗单片BUS Tranceivers [MIL-STD-1553B Remote Terminal, BUS Controller, or Passive Monitor Hybrid with Status Word Control Dual Low Power Monolithic BUS Tranceivers]
分类和应用: 总线控制器监控
文件页数/大小: 49 页 / 358 K
品牌: AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
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Pin Description  
Signal  
Direction  
Pin  
Signal Description  
INPUT  
K6,K5  
J5,H5  
F4  
RTAD 0-4  
RT address lines - These should be hardwired by the user.  
RTAD4 is the most significant bit.  
INPUT  
INPUT  
J6  
RTADPAR  
RT address parity line - This must be hardwired by the user to  
give odd parity.  
J4  
BIT DECODE  
Bitword Decode - When held low, prevents resetting TXTO Bit,  
HSFAIL Bit, and LTFAIL Bit in the BIT Word (as well as TF and  
SSF Bits in the Status Word) upon receipt of a Transmit Bit  
Word Mode Command.  
INPUT  
INPUT  
F5  
G5  
E4  
BCSTEN 1  
BCSTEN 0  
6MCK (Clock)  
Broadcast command enable Bus 1 - When low the  
recognition of broadcast command is prevented on Bus 1.  
Broadcast command enable Bus 0 - When low the  
recognition of broadcast command is prevented on Bus 0.  
INPUT  
BIDIR  
6 Megahertz master clock.  
E9  
D6  
D7  
A9  
D8  
B9  
D9  
C9  
IH 08 (LSB)  
IH 19  
Internal Highway - Bi-directional 8 bit highway on which 16 bit  
words are passed in two bytes. IH 715 is the most significant bit  
of each byte, the most significant byte being transferred first.  
The highway should only be driven by the subsystem when data  
is to be transferred to the RT.  
IH 210  
IH 311  
IH 412  
IH 513  
IH614  
IH715 (MSB)  
OUTPUT  
K10  
DTRQ  
Data Transfer Request - Goes low to request a data transfer  
between the ASIC and subsystem. Goes high at the end of the  
transfer.  
INPUT  
F6  
G6  
J9  
DTAK  
IUSTB  
H/L  
Data Transfer Acknowledge - Goes low to indicate that the  
subsystem is ready for the data transfer.  
OUTPUT  
OUTPUT  
OUTPUT  
Interface Unit Strobe - This is a double pulse strobe used to  
transfer the two bytes of data  
High/Low - Indicates which byte of data is on the internal  
highway. Logic level "0" for least significant byte.  
J7  
GBR  
Good Block Received - Pulses low for 500ns when a block of  
data has been received by the ASIC and has passed all the  
validity and error checks.  
OUTPUT  
INPUT  
G9  
E8  
NBGT  
New Bus Grant - Pulses low whenever a new command is  
accepted by the ASIC.  
MEREQ  
Message Error Request - Positive-going edge will cause  
Message Error Bit in Status Word to be set.  
12  
Aeroflex Circuit Technology  
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700