Table 9: External I/O Reset State
I/O State During
Reset
External I/O
I/O Function After Reset
I/O State After Reset
Address/Data Bus (AD15:0)
Address/Data Bus
ALE
Pulled High
Driven Output
Driven Output
ALE
ADV
Pulled High
RD
RD
Pulled High
Pulled High
Driven Output
Driven Output
WR
WR
WRL
Undefined Inputs 1
Undefined I/O1,2
Port 0 (P0.0-P0.3; P0.6)
ECB(4:0)
[P0.0-P0.3; P0.6] and
ECB(4:0)
Undefined Inputs 1
Undefined Input1
Undefined Inputs 1
Undefined Input1
Port 0 (P0.4 and P0.5)
P0.4 and P0.5
P0.7
Port 0 (P0.7)
EXTINT
NMI
NMI
Pulled Down
Pulled Down
Disabled Input1
Disabled Input1
HSI.0
T2RST
HSI.0
Disabled Input1
Disabled Input1
HSI.1
T2CLK
HSI.1
Disabled I/O1
Disabled I/O1
Disabled I/O1
HSI.2/HSO.4
Undefined
Disabled I/O1
Pulled Down
HSI.3/HSO.5
Undefined
HSO.0 through HSO.3
HSO.0-HSO.3
Driven Low
Outputs
Port 1 (P1.0-P1.7)
PWM1; PWM2;
BREQ; HLDA; HOLD
P1.0-P1.7
Pulled Up
Pulled Up
Pulled Up
Port 2 (P2.0)
TXD
TXD
Driven High
Output
Undefined Input1
Undefined Input1
Undefined Input1
Undefined Input1
Undefined Input1
Undefined Input1
Undefined Input1
Undefined Input1
Port 2 (P2.1)
RXD
RXD
Port 2 (P2.2)
EXTINT
P2.2 and EXTINT
P2.3 and T2CLK
P2.4
Port 2 (P2.3)
T2CLK
Port 2 (P2.4)
T2RST
9
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
