Table 7. SFR Memory Mapping
Address
019H
018H
017H
016H
015H
014H
013H
012H
011H
010H
00FH
00EH
00DH
00CH
00BH
00AH
009H
008H
007H
006H
005H
004H
003H
002H
001H
000H
HWin 0 Read
Stack Pntr (hi)
Stack Pntr (lo)
IOS2
IOS1
IOS0
WSR
INT_MASK1
INT_PEND1
SP_STAT
PORT 2
PORT 1
PORT 0
Timer 2 (hi)
Timer 2 (lo)
Timer 1 (hi)
Timer 1 (lo)
INT_PEND
INT_MASK
SBUF (RX)
HSI_status
HSI_time(hi)
HSI_time (lo)
RESERVED
RESERVED
Zero_reg (hi)
Zero_reg (lo)
HWin 0 Write
Stack Pntr (hi)
Stack Pntr (lo)
PWM0_CTRL
IOC1
IOC0
WSR
INT_MASK1
INT_PEND1
SP_CON
PORT 2
PORT 1
BAUD RATE
Timer 2 (hi)
Timer 2 (lo)
IOC2
Watchdog
INT_PEND
INT_MASK
SBUF (TX)
HSO_command
HSO_time (hi)
HSO_time (lo)
HSI_mode
RESERVED
Zero_reg (hi)
Zero_reg (lo)
HWin 1
Stack Pntr (hi)
Stack Pntr (lo)
PWM2_CTRL
PWM1_CTRL
EDAC-CS
2
WSR
INT_MASK1
INT_PEND1
RESERVED
RESERVED
Timer 3(hi)
2
Timer 3(lo)
2
WDT-SCALE
2
IOC3
INT_PRI(hi)
2
INT_PRI(lo)
2
INT_PEND
INT_MASK
PTSSRV (hi)
PTSSRV (lo)
PTSSEL (hi)
PTSSEL (lo)
RESERVED
RESERVED
Zero-reg (hi)
Zero_reg (lo)
HWin 15
1
Stack Pntr (hi)
Stack Pntr (lo)
***
***
***
WSR
INT_MASK1
INT_PEND1
***
PSW
2
RESERVED
RESERVED
T2CAPTURE (hi)
T2CAPTURE (lo)
***
***
INT_PEND
INT_MASK
***
***
***
***
***
RESERVED
Zero_reg (hi)
Zero_reg (lo)
Notes:
1. For some functions that share a register address in HWindow0, the opposite access type (read/write) is available in HWindow 15 if
indicated by the three asterisks (***).
2. These registers are not available in the industry standard 8XC196KD. Therefore, industry standard development software will n ot recognize these
mnemonics, and you will only be able to access them via their physical addresses.
6
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
