5
ALE falling edge toWR falling edge
TOSC - 10
TOSC +10
ns
tLLWL
tCLWL
CLKOUT low to WR falling edge
Data stable toWR rising edge
-5
+10
ns
ns
2
TOSC - 10
TOSC +10
tQVWH
5
CLKOUT high to WR rising edge
WR low period
-10
+15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCHWH
2,5
TOSC - 10
TOSC - 10
TOSC - 10
TOSC - 10
TOSC - 25
TOSC - 10
TOSC - 25
tWLWH
5
Data hold after WR rising edge
WR rising edge to ALE rising edge
BHE, INST after WR rising edge
AD8-15 HOLD after WR rising
BHE, INST after RD rising edge
AD8-15 HOLD afterRD rising
Address valid toEDACEN valid
EDACEN hold after ALE high
Address valid to EDAC input valid
EDAC hold after RD inactive
EDAC output stable to WR rising
EDAC output hold afterWR rising
TOSC +10
TOSC +10
TOSC +10
tWHQX
3,5
tWHLH
5
tWHBX
4,5
tWHAX
5
TOSC +10
2TOSC -30
tRHBX
4,5
tRHAX
5
tAVENV
5
0
tLHENX
2,5
3TOSC -29
TOSC -10
TOSC +10
TOSC +10
tAVEV
5
0
tRXEX
2,5
TOSC -10
TOSC -10
tEVWH
5
tWHEX
Note:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883 Method 1019 at 1.0E5 rads(Si).
1. If max exceeded, additional wait state occurs.
2. If wait states are used, add 2 T
*N, where N = number of wait states.
OSC
3. Assuming back-to-back bus cycles.
4. 8-bit only
5. Tested only at initial qualification, and after any design or process changes which may affect this characteristic.
6. These specs are verified using functional vectors (strobed) only.
7. Low speed tests performed at 5MHz. 1MHz operation is guaranteed by design.
27
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
