1.0 SIGNAL DESCRIPTION
Port 0 (P0.0 - P0.7):
Port 0 is an 8-bit input only port when used
in its default mode. When configured for their alternate function,
five of the bits are bi-directional EDAC check bits as shown in
Table 1.
Port 1 (P1.0 - P1.7):
Port 1 is an 8-bit, quasi-bidirectional, I/O
port. All pins are quasi-bidirectional unless the alternate
function is selected per Table 2. When the pins are configured
for their alternate functions, they act as standard I/O, not quasi-
bidirectional.
Port 2 (P2.0 - P2.7):
Port 2 is an 8-bit, multifunctional, I/O port.
These pins are shared with timer 2 functions, serial data I/O and
PWM0 output, per Table 3.
P1.4
AD0-AD7:
The lower 8-bits of the multiplexed address/data
bus. The pins on this port are bidirectional during the data phase
of the bus cycle.
P1.5
AD8-AD15:
The upper 8-bits of the multiplexed address/data
bus. The pins on this port are bidirectional during the data phase
of the 16-bit bus cycle. When running in 8-bit bus width, these
pins are non-multiplexed, dedicated upper address bit outputs.
HSI:
Inputs to the High Speed Input Unit. Four HSI pins are
available: HSI.0, HSI.1, HSI.2, and HSI.3. Two of these pins
(HSI.2 and HSI.3) are shared with the HSO Unit. Two of these
pins (HSI.0 and HSI.1) have alternate functions for Timer 2.
HSO:
Outputs from the High Speed Output Unit. Six HSO pins
are available: HSO.0, HSO.1, HSO.2, HSO.3, HSO.4, and
HSO.5. Pins HSO.4 and HSO.5 are shared with pins HSI.2 and
HSI.3 of the HSI Unit respectively.
BREQ
PWM2
Table 2. Port 1 Alternate Functions
Port
Pin
P1.0
P1.1
P1.2
P1.3
Alternate
Name
P1.0
P1.1
P1.2
PWM1
Alternate Function
I/O Pin
I/O Pin
I/O Pin
Setting IOC3.2=1 enables P1.3 as
the Pulse Width Modulator
(PWM1) output pin.
Setting IOC3.3=1 enables P1.4 as
the Pulse Width Modulator
(PWM2) output pin.
Bus Request, output activated
when the bus controller has a
pending external memory cycle.
Bus Hold Acknowledge, output
indicating the release of the bus.
Bus Hold, input requesting control
of the bus.
P1.6
P1.7
HLDA
HOLD
Table 3. Port 2 Alternate Functions
Port
Pin
P2.0
P2.1
P2.2
Alternate
Name
TXD
RXD
EXTINT
Alternate Function
Transmit Serial Data.
Receive Serial Data.
External interrupt. Clearing
IOC1.1 will allow P2.2 to be
used for EXTINT (INT07)
Timer 2 clock input and Serial
port baud rate generator input.
Timer 2 Reset
Pulse Width Modulator
output 0
Controls the direction of the
Timer 2 counter. Logic High
equals count down. Logic low
equals count up.
A rising edge on P2.7 causes
the value of Timer 2 to be
captured into this register, and
generates a Timer 2 Capture
interrupt (INT11).
Table 1. Port 0 Alternate Functions
Port Pin
P0.0-P0.3,
P0.6
P0.4
P0.5
P0.7
EXTINT
Alternate
Name
ECB0-ECB4
Alternate Function
P2.3
P2.4
T2CLK
T2RST
PWM0
T2UP-DN
Error Detection & Correction
Check Bits
Input Port Pins
P2.5
P2.6
Setting IOC1.1=1 will allow P0.7
to be used for EXTINT (INT07)
P2.7
T2CAPTURE
2
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
