RECOMMENDED OPERATING CONDITIONS
SYMBOL
VDD
PARAMETER
LIMITS
4.5 to 5.5
UNITS
V
Positive supply voltage
Case temperature range
DC input voltage
TC
-55 to +125
°C
VIN
0 to VDD
V
DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
(VDD = 5.0V ±10%; -55°C < TC < +125°C)
SYMBOL
VIH
PARAMETER
High-level input voltage
Low-level input voltage
CONDITION
MINIMUM
MAXIMUM
UNIT
(TTL)
(TTL)
2.4
V
V
VIL
0.8
0.4
VOL1
VOL2
VOH1
VOH2
Low-level output voltage
Low-level output voltage
High-level output voltage
High-level output voltage
Input capacitance
IOL = 4.0mA, VDD = 4.5V (TTL)
IOL = 200mA, VDD = 4.5V (CMOS)
IOH = -200mA, VDD = 4.5V (CMOS)
IOH = -2.0mA, VDD = 4.5V (TTL)
V
VSS + 0.10
V
VDD -0.1
2.4
V
V
1
¦ = 1MHz, VDD = 5.0V
15
15
pF
CIN
VIN = 0V
1, 4
Bidirectional I/O capacitance ¦ = 1MHz, VDD = 5.0V
pF
CIO
VOUT = 0V
IIN
Input leakage current
VIN = 0V to VDD
-5
5
mA
mA
IOZ
Three-state output leakage
current
VO = 0V to VDD
VDD = 5.5V
OE= 5.5V
-10
10
2,3
Short-circuit output current
VDD = 5.5V, VO = VDD
VDD = 5.5V, VO = 0V
90
mA
mA
IOS
-90
5
Supply current operating
@25.0MHz (40ns product)
TTL inputs levels (IOUT = 0), VIL =
0.2V
IDD1(OP)
125
117
mA
mA
@22.2MHz (45ns product)
VDD, PE = 5.5V
IDD2(SB) Supply current standby
post-rad
CMOS input levels VIL = VSS +0.25V
CE = VDD - 0.25 VIH = VDD - 0.25V
2
mA
Notes:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883 Method 1019 at 1E6 rad(Si).
1. Measured only for initial qualification, and after process or design changes that could affect input/output capacitance.
2. Supplied as a design limit but not guaranteed or tested.
3. Not more than one output may be shorted at a time for maximum duration of one second.
4. Functional test.
5. Derates at 3.0mA/MHz.
3