Table 3. SFR Memory Registers
CCAP0H CCAP1H CCAP2H CCAP3H
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
CH
00000000
CCAP4H
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
FF
F7
EF
E7
DF
D7
CF
C7
BF
B7
AF
A7
9F
97
B
00000000
CL
00000000
CCAP0L
CCAP1L
CCAP2L
CCAP3L
CCAP4L
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ACC
00000000
CCON
00X00000
CMOD
OOXXX000
CCAPM0
CCAPM1
CCAPM2
CCAPM3
CCAPM4
X00000000
X00000000
X00000000
X00000000
X00000000
PSW
00000000
T2CON
00000000
T2MOD
XXXXXX00
RCAP2L
00000000
RCAP2H
00000000
TL2
00000000
TH2
00000000
IP
SADEN
00000000
X0000000
P3
11111111
IPH
X00000000
IE
SADDR
00000000
00000000
P2
11111111
SCON
00000000
SBUF
XXXXXXXX
90
P1
11111111
88
TCON
00000000
TMOD
00000000
TL0
00000000
TL1
00000000
TH0
00000000
TH1
00000000
8F
87
80
P0
SP
DPL
DPH
PCON
11111111
00000111
00000000
00000000
00XX00XX
Notes:
1. Values shown are the reset values of the registers.
2. X = undefined.
6