APPLICATIONS INFORMATION
The UT54LVDS032 receiver’s intended use is primarily in an
uncomplicated point-to-point configuration as is shown in
Figure 3. This configuration provides a clean signaling
environment for quick edge rates of the drivers. The receiver is
connected to the driver through a balanced media which may be
a standard twisted pair cable, a parallel pair cable, or simply
PCB traces. Typically, the characteristic impedance of the media
is in the range of 100W. A termination resistor of 100W should
be selected to match the media and is located as close to the
receiver input pins as possible. The termination resistor converts
the current sourced by the driver into voltages that are detected
by the receiver. Other configurations are possible such as a
multi-receiver configuration, but the effects of a mid-stream
connector(s), cable stub(s), and other impedance discontinuities,
as well as ground shifting, noise margin limits, and total
termination loading must be taken into account.
1
R
16
V
DD
IN1-
2
3
R
15
14
R
R
IN1+
IN4-
R
OUT1
IN4+
UT54LVDS032
Receiver
EN
4
5
6
13
12
11
R
OUT4
R
EN
OUT2
R
R
R
IN2+
OUT3
IN3+
7
8
R
10
9
IN2-
V
SS
R
IN3-
Figure 2. UT54LVDS032 Pinout
TRUTH TABLE
ENABLE
1/4 UT54LVDS032
DATA
+
-
Enables
Input
RIN+ - RIN-
X
Output
RT 100W
INPUT
1/4 UT54LVDS031
DATA
OUTPUT
EN
L
EN
ROUT
H
Z
H
L
All other combinations
of ENABLE inputs
VID > 0.1V
VID < -0.1V
Figure 3. Point-to-Point Application
Full Fail-safe
OPEN/SHORT or
Terminated
H
The UT54LVDS032 differential line receiver is capable of
detecting signals as low as 100mV, over a + 1V common-mode
range centered around +1.2V. This is related to the driver offset
voltage which is typically +1.2V. The driven signal is centered
around this voltage and may shift+1V around this center point.
The +1V shifting may be the result of a ground potential
difference between the driver’s ground reference and the
receiver’s ground reference, the common-mode effects of
coupled noise or a combination of the two. Both receiver input
pins should honor their specified operating input voltage range
of 0V to +2.4V (measured from each pin to ground).
PIN DESCRIPTION
Pin No.
Name
Description
2, 6, 10, 14
RIN+
Non-inverting receiver input pin
Inverting receiver input pin
Receiver output pin
1, 7, 9, 15
3, 5, 11, 13
4
RIN-
ROUT
EN
Active high enable pin, OR-ed
with EN
12
EN
Active low enable pin, OR-ed
with EN
16
8
VDD
VSS
Power supply pin, +5V + 10%
Ground pin
2
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