IF OUTPUT
Frequency
Center 77.76 MHz
Level
Relative to RF input (0 dB input attenuation selected)
Typically -3 dB between 330 MHz to 2.5 GHz
Typically -5 dB between 2.5 GHz to 3 GHz
Bandwidth
Typically >100 MHz (-3 dB)
Trigger Polarity
+ve or –ve (Edge trigger) Gate High, Gate Low (Gated trigger)
TRIGGER FUNCTIONS
Pre-trigger
0 to sample length
Delayed Trigger
–10 to + 2G samples
Trigger Latency
0 to 1 sample at the output sample rate
A/D CONVERSION
Resolution
14 bits
ADC Clock
Fixed 103.68 MHz
Sample Rate Control
IF: 103.68 MHz
IQ: Variable 6328.125 S/s to 85 MS/s or 51.84 MS/s with LVDS out-
put enabled
Sample Rate Resolution
0.1 Hz when the sample rate is enterred as a real number
Sample rate can be entered as a fraction made up of integers
Sample Rate Accuracy
As per 10 MHz ref
(1)
(1)
FFT SPECTRUM ANALYZER MEASUREMENT SUITE
FFT Length
2
n
for n = 7 to 16
Measurement Bandwidth
2 Hz up to 10 MHz
Window Type
NEBW: Gaussian 3 dB: Gaussian Fixed: Blackman Harris 5 term
Channel Power and Adjacent Channel Power
Adjacent Channels: 2 upper and 2 lower subject to 33 MHz bandwidth
limitation
Channel filter alpha: 0 to 1
Channel spacing: up to 15 MHz
Channel width: up to 25 MHz
Occupied Bandwidth (OBW)
Percentage range: 1% to 99.99%
Marker Functions
Marker power, peak search, next peak
Time Domain Functions
(Computed for the entire IQ sample record or any subset) Average
Power, Power versus Time, Frequency versus Time
add ±2 µHz when using generic resampling mode
Amplitude Flatness (correction on)
Flatness correction on: 0.25 dB to 33 MHz, 0.1 dB across center
5 MHz
Phase Flatness (typical with correction on)
0.03 radians pk-pk to 33 MHz
Data Output
A sample data block (equal to the data capture length) can be stored
to the memory internal to the 3030 and then transferred to the con-
troller via the PCI bus. Sample data can be continuously streamed out
of the LVDS connector.
IF data samples have 16 bit resolution. IQ data samples can be 16 or
32 bit resolution.
Data Transfer Rate
Typically 10 Mwords/s (a word is 32 bits long)
IQ and IF block data transfer when using 2.2 GHz embedded CPU run-
ning windows XP
Sample Memory
128 M x 16 bit samples
INTERFACES
3010/11
LO output, (SMA)
10 MHz reference I/O (SMA x 2)
PCI bus interface including PXI triggering functions
3030A
RF input (SMA)
Local oscillator input (SMA)
IF output and; IF input (SMA * 2)
10 MHz reference (SMA * 2)
IF or IQ 16 bit LVDS data (VHDCI)
PCI bus interface including PXI triggering functions
TTL trigger (SMB)
TRIGGERING
Trigger Mode
Single, Repeat
Trigger Type
Edge, Gated, NONE (software triggered)
Hardware Trigger Sources
Internal (IF, derived from IQ data with user defined level control)
External (LVDS, LBL, Trig Bus, Star Trigger, TTL)
POWER CONSUMPTION (TYPICAL)
3010/3011
+3.3 V
+5 V
+12 V
-12 V
50 mA
(1)
650 mA
50 mA
(2)
30 mA
3030A
3A
1.5 A
300 mA
150 mA
1. 250 mA transiently during power up
2. 3011 OCXO requires 300 mA startup reducing to 150 mA after 5
minutes
For the very latest specifications visit
www.aeroflex.com
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
