DYNAMIC CHARACTERISTICS
Symbol
C
ies
C
oes
C
res
V
GEP
Q
g
Q
ge
Q
gc
SSOA
t
d(on)
t
r
t
d(off)
t
f
E
on1
E
on2
E
off
t
d(on)
t
r
t
d(off)
t
f
E
on1
E
on2
E
off
Characteristic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate-to-Emitter Plateau Voltage
Total Gate Charge
3
APT25GN120B_S(G)
Test Conditions
Capacitance
V
GE
= 0V, V
CE
= 25V
f = 1 MHz
Gate Charge
V
CE
= 600V
I
C
= 150A
T
J
= 150°C, R
G
= 4.3Ω
7
,
V
GE
=
15V, L = 100µH,V
CE
= 1200V
Inductive Switching (25°C)
V
CC
= 800V
V
GE
= 15V
I
C
= 150A
V
GE
= 15V
MIN
TYP
MAX
UNIT
pF
V
nC
1800
105
85
9.5
155
10
85
75
22
17
280
135
TBD
1490
2150
22
17
335
225
TBD
2390
3075
m
J
ns
ns
A
Gate-Emitter Charge
Gate-Collector ("Miller ") Charge
Switching Safe Operating Area
Turn-on Delay Time
Current Rise Time
Turn-off Delay Time
Current Fall Time
Turn-on Switching Energy
Turn-off Switching Energy
Turn-on Delay Time
Current Rise Time
Turn-off Delay Time
Current Fall Time
Turn-on Switching Energy
Turn-off Switching Energy
4
4
55
4
5
R
G
= 1.0Ω
7
T
J
= +25°C
Turn-on Switching Energy (Diode)
6
m
J
Inductive Switching (125°C)
V
CC
= 800V
V
GE
= 15V
I
C
= 150A
Turn-on Switching Energy (Diode)
66
T
J
= +125°C
R
G
= 1.0Ω
7
THERMAL AND MECHANICAL CHARACTERISTICS
Symbol
R
θ
JC
R
θ
JC
W
T
Characteristic
Junction to Case
(IGBT)
Junction to Case
(DIODE)
Package Weight
MIN
TYP
MAX
UNIT
°C/W
gm
.46
N/A
5.9
1 Repetitive Rating: Pulse width limited by maximum junction temperature.
2 For Combi devices, I
ces
includes both IGBT and FRED leakages
3 See MIL-STD-750 Method 3471.
4 E
on1
is the clamped inductive turn-on energy of the IGBT only, without the effect of a commutating diode reverse recovery current
adding to the IGBT turn-on loss. Tested in inductive switching test circuit shown in figure 21, but with a Silicon Carbide diode.
5 E
on2
is the clamped inductive turn-on energy that includes a commutating diode reverse recovery current in the IGBT turn-on switching
loss. (See Figures 21, 22.)
11-2005
6 E
off
is the clamped inductive turn-off energy measured in accordance with JEDEC standard JESD24-1. (See Figures 21, 23.)
7 R
G
is external gate resistance, not including R
G(int)
nor gate driver impedance. (MIC4452)
APT Reserves the right to change, without notice, the specifications and information contained herein.
050-7600
Rev D
ADPOW [ ADVANCED POWER TECHNOLOGY ]
