OP270
0
–1
–2
–3
–4
–5
–6
–7
FIVE-BAND LOW NOISE STEREO GRAPHIC EQUALIZER
The graphic equalizer circuit shown in Figure 14 provides 15 dB of
boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz
bandwidth is better than 100 dB and referred to a 3 V rms input.
Larger inductors can be replaced by active inductors, but this
reduces the signal-to-noise ratio.
SINGLE OP AMP.
CONVENTIONAL DESIGN
CASCADED
(TWO STAGES)
DIGITAL PANNING CONTROL
Figure 15 uses a DAC8221, a dual 12-bit CMOS DAC, to pan
a signal between two channels. One channel is formed by the
current output of DAC A driving one-half of an OP270 in a
current-to-voltage converter configuration. The other channel is
formed by the complementary output current of DAC A, which
normally flows to ground through the AGND pin. This comple-
mentary current is converted to a voltage by the other half of the
OP-270, which also holds AGND at virtual ground.
LOW PHASE ERROR
AMPLIFIER
0.001
0.01
0.1
1.0
0.005
0.05
0.5
FREQUENCY RATIO (1/)(/ )
T
Gain error due to mismatching between the internal DAC ladder
resistors and the current-to-voltage feedback resistors is elimi-
nated by using feedback resistors internal to the DAC8221. Only
DAC A passes a signal; DAC B provides the second feedback
resistor. With VREFB unconnected, the current-to-voltage converter,
using RFBB, is accurate and not influenced by digital data reach-
ing DAC B. Distortion of the digital panning control is less than
0.002% over the 20 Hz to 20 kHz audio range. Figure 16 shows
the complementary outputs for a 1 kHz input signal and a digital
ramp applied to the DAC data input.
Figure 13. Phase Error Comparison
C1
0.47F
V
+
IN
R2
3.3k⍀
R1
47k⍀
1/2
+
OP270E
R14
100⍀
1/2
OP270E
V
OUT
–
R4
1k⍀
–
C2
R3
680⍀
R13
3.3k⍀
6.8F
L1
1H
60Hz
+
TANTALUM
DUAL PROGRAMMABLE GAIN AMPLIFIER
R6
1k⍀
The dual OP270 and the DAC8221, a dual 12-bit CMOS
DAC, can be combined to form a space-saving dual program-
mable amplifier. The digital code present at the DAC, which is
easily set by a microprocessor, determines the ratio between the
internal feedback resistor and the resistance the DAC ladder
presents to the op amp feedback loop. Gain of each amplifier is
C3
R5
680⍀
1F
L2
200Hz
+
600mH
TANTALUM
R8
1k⍀
C4
0.22F
R7
680⍀
L3
800Hz
3kHz
180mH
VOUT
VIN
4096
n
R10
1k⍀
= –
C5
0.047F
R9
680⍀
L4
where n equals the decimal equivalent of the 12-bit digital code
present at the DAC. If the digital code present at the DAC
consists of all zeros, the feedback loop will open, causing the op
amp output to saturate. A 20 MW resistor placed in parallel with
the DAC feedback loop eliminates this problem with only a very
small reduction in gain accuracy.
60mH
R12
1k⍀
C6
0.022F
R11
680⍀
L5
10kHz
10mH
Figure 14. 5-Band Low Noise Graphic Equalizer
–12–
REV. C
ADI [ ADI ]
