ADN8830–SPECIFICATIONS
Parameter
TEMPERATURE STABILITY
Long-Term Stability
PWM OUTPUT DRIVERS
Output Transition Time
Nonoverlapping Clock Delay
Output Resistance
Output Voltage Swing
Output Voltage Ripple
Output Current Ripple
LINEAR OUTPUT AMPLIFIER
Output Resistance
Output Voltage Swing
POWER SUPPLY
Power Supply Voltage
Power Supply Rejection Ratio
Supply Current
Shutdown Current
Soft-Start Charging Current
Undervoltage Lockout
ERROR AMPLIFIER
Input Offset Voltage
Gain
Input Voltage Range
Common-Mode Rejection Ratio
Open-Loop Input Impedance
Gain-Bandwidth Product
REFERENCE VOLTAGE
Reference Voltage
OSCILLATOR
Synchronization Range
Oscillator Frequency
LOGIC CONTROL*
Logic Low Input Threshold
Logic High Input Threshold
Logic Low Output Level
Logic High Output Threshold
Symbol
(@ V
DD
= 3.3 V to 5.0 V, V
GND
= 0 V, T
A
= 25 C, T
SET
= 25 C, using typical application
configuration as shown in Figure 1, unless otherwise noted.)
Min
Typ
Max
Unit
Conditions
Using 10 kΩ thermistor with
= –4.4% at 25°C
0.01
20
65
6
V
DD
0.2
0.2
85
178
0
3.0
80
60
V
DD
5.5
92
8
5
15
2.0
50
20
0.2
58
55
68
1
2
12
15
°C
ns
ns
Ω
V
%
%
Ω
Ω
V
V
dB
dB
mA
mA
µA
µA
V
µV
V/V
V
dB
dB
GΩ
MHz
V
kHz
kHz
t
R
, t
F
R
O
(N1, P1)
OUT A
OUT A
I
TEC
R
O, P2
R
O, N2
OUT B
V
DD
PSRR
I
SY
I
SD
I
SS
V
OLOCK
V
OS
A
V, IN
V
CM
CMRR
R
IN
GBW
V
REF
f
CLK
f
CLK
C
L
= 3,300 pF
50
I
L
= 50 mA
V
LIM
= 0 V
f
CLK
= 1 MHz
f
CLK
= 1 MHz
I
OUT
= 2 mA
I
OUT
= 2 mA
0
V
DD
= 3.3 V to 5 V, V
TEC
= 0 V
–40°C
≤
T
A
≤
+85°C
PWM not switching
–40°C
≤
T
A
≤
+85°C
Pin 10 = 0 V
Low-to-high threshold
V
CM
= 1.5 V
0.2 V < V
CM
< 2.0 V
–40°C
≤
T
A
≤
+85°C
2.7
250
2.0
I
REF
< 2 mA
Pin 25 connected to external clock
Pin 24 = V
DD
; (R = 150 kΩ;
Pin 25 = GND)
2.37
200
800
2.47
2.57
1,000
1,250
1,000
0.2
3
0.2
V
DD
– 0.2
V
V
V
V
*Logic
inputs meet typical CMOS I/O conditions for source/sink current (~1
µA).
Specifications subject to change without notice.
–2–
REV. C