AD±±70
Table 8. Partial List of Precision References Recommended
for Use with the AD5570
OPTO-COUPLER INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD5570
makes it ideal for opto-isolated interfaces, because the number
of interface lines is kept to a minimum. Figure ꢁ0 shows a
ꢁ-channel isolated interface to the AD5570. To reduce the
number of opto-isolators, if the simultaneous updating of the
DAC is not required, the LDAC pin may be tied permanently
low. The DAC can then be updated on the rising edge of SYNC.
Initial
Accuracy
(mV max) (ppm typ)
Long-Term
Drift
Temp Drift
(ppm/
°C max)
0.1 Hz to
10 Hz Noise
(µV p-p typ)
Part No.
ADR435
ADR425
ADR021
ADR3ꢀ5
AD5ꢁ6
30
50
50
50
15
3
3.4
3.4
15
5
± 6
± 6
±5
±6
±2.5
3
3
25
10
4
1Available in SC±0 package.
LAYOUT GUIDELINES
V
CC
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5570 is mounted should be designed so that the
analog and digital sections are separated and confined to
certain areas of the board. If the AD5570 is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
µCONTROLLER
CONTROL OUT
TO LDAC
TO SYNC
TO SCLK
TO SDIN
SYNC OUT
SERIAL CLOCK OUT
The AD5570 should have ample supply bypassing of 10 µF in
parallel with 0.1 µF on each supply located as close to the pack-
age as possible, ideally right up against the device. The 10 µF
capacitors are the tantalum bead type. The 0.1 µF capacitor
should have low effective series resistance (ESR) and effective
series inductance (ESI) such as the common ceramic types,
which provide a low impedance path to ground at high frequen-
cies to handle transient currents due to internal logic switching.
SERIAL DATA OUT
OPTO-COUPLER
Figure 40. Opto-Isolated Interface
The power supply lines of the AD5570 should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground to
avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. A ground line routed
between the SDIN and SCLK lines helps reduce crosstalk
between them (not required on a multilayer board, which has a
separate ground plane, but separating the lines helps). It is
essential to minimize noise on the REFIN line, because it
couples through to the DAC output.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5570 is via a serial bus
that uses standard protocol compatible with microcontrollers
and DSP processors. The communications channel is a 3-wire
(minimum) interface consisting of a clock signal, a data signal,
and a synchronization signal. The AD5570 requires a 16-bit
data word with data valid on the falling edge of SCLK.
For all the interfaces, the DAC output update may be done
automatically when all the data is clocked in, or it may be done
under the control of
may be read using the readback function.
. The contents of the DAC register
LDAC
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feed through the board. A microstrip
technique is by far the best, but not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to ground plane, while signal traces are
placed on the solder side.
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