Features
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Single 2.5V or 2.7V to 3.6V Supply
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RapidS Serial Interface: 66MHz Maximum Clock Frequency
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– SPI Compatible Modes 0 and 3
User Configurable Page Size
– 256-Bytes per Page
– 264-Bytes per Page
– Page Size Can Be Factory Pre-configured for 256-Bytes
Page Program Operation
– Intelligent Programming Operation
– 4,096 Pages (256/264-Bytes/Page) Main Memory
Flexible Erase Options
– Page Erase (256-Bytes)
– Block Erase (2-Kbytes)
– Sector Erase (64-Kbytes)
– Chip Erase (8Mbits)
Two SRAM Data Buffers (256-/264-Bytes)
– Allows Receiving of Data while Reprogramming the Flash Array
Continuous Read Capability through Entire Array
– Ideal for Code Shadowing Applications
Low-power Dissipation
– 7mA Active Read Current Typical
– 25μA Standby Current Typical
– 15μA Deep Power Down Typical
Hardware and Software Data Protection Features
– Individual Sector
Sector Lockdown for Secure Code and Data Storage
– Individual Sector
Security: 128-byte Security Register
– 64-byte User Programmable Space
– Unique 64-byte Device Identifier
JEDEC Standard Manufacturer and Device ID Read
100,000 Program/Erase Cycles Per Page Minimum
Data Retention – 20 Years
Industrial Temperature Range
Green (Pb/Halide-free/RoHS Compliant) Packaging Options
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8-megabit
2.5V or 2.7V
DataFlash
AT45DB081D
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1. Description
The Adesto
®
AT45DB081D is a 2.5V or 2.7V, serial-interface Flash memory
ideally suited for a wide variety of digital voice-, image-, program code- and data-stor-
age applications. The AT45DB081D supports RapidS
™
serial interface for
applications requiring very high speed operations. RapidS serial interface is SPI com-
patible for frequencies up to 66MHz. Its 8,650,752-bits of memory are organized as
4,096 pages of 256-bytes or 264-bytes each. In addition to the main memory, the
AT45DB081D also contains two SRAM buffers of 256-/264-bytes each. The buffers
allow the receiving of data while a page in the main Memory is being reprogrammed,
as well as writing a continuous data stream. EEPROM emulation (bit or byte alterabil-
ity) is easily handled with a self-contained three step read-modify-write operation.
Unlike conventional Flash memories that are accessed randomly with multiple
3596O–DFLASH–1/2013
AD [ ANALOG DEVICES ]
