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ADV7190KST 参数 Datasheet PDF下载

ADV7190KST图片预览
型号: ADV7190KST
PDF下载: 下载PDF文件 查看货源
内容描述: 视频编码器与六10位DAC和视频编码器与六DAC输出 [Video Encoder with Six 10-Bit DACs and Video Encoder with Six DAC Outputs]
分类和应用: 编码器
文件页数/大小: 69 页 / 625 K
品牌: ADI [ ADI ]
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ADV7190/ADV7191  
COLOR BAR GENERATION  
FEATURES: FUNCTIONAL DESCRIPTION  
BRIGHTNESS DETECT  
The ADV7190/ADV7191 can be configured to generate 100/  
7.5/75/7.5 color bars for NTSC or 100/0/75/0 color bars for  
PAL. (Mode Register 4.)  
This feature is used to monitor the average brightness of the  
incoming Y signal on a field-by-field basis. The information is  
read from the I2C and based, on this information, the color  
saturation, contrast and brightness controls can be adjusted (for  
example to compensate for very dark pictures). (Brightness Detect  
Register.)  
COLOR BURST SIGNAL CONTROL  
The burst information can be switched on and off the composite  
and chroma video output. (Mode Register 4.)  
COLOR CONTROLS  
CHROMA/LUMA DELAY  
The ADV7190/ADV7191 allows the user to control the brightness,  
contrast, hue, and saturation of the color. The control regis-  
ters may be double-buffered, meaning that any modification to  
the registers will be done outside the active video region and,  
therefore, changes made will not be visible during active video.  
The luminance data can be delayed by maximum of six clock  
cycles. Additionally the Chroma can be delayed by a maximum  
of eight clock cycles (one clock cycle at 27 MHz). (Timing  
Register 0 and Mode Register 9.)  
Contrast Control  
Contrast adjustment is achieved by scaling the Y input data by a  
factor programmed by the user. This factor allows the data to be  
scaled between 0% and 150%. (Contrast Control Register.)  
LUMA DELAY  
CHROMA DELAY  
Brightness Control  
The brightness is controlled by adding a programmable setup level  
onto the scaled Y data.  
For NTSC with pedestal, the setup can vary from 0 IRE to  
22.5 IRE. For NTSC without pedestal and PAL, the setup can  
vary from –7.5 IRE to +15 IRE. (Brightness Control Register.)  
Figure 26. Chroma Delay  
Figure 27. Luma Delay  
Color Saturation  
CLAMP OUTPUT  
Color adjustment is achieved by scaling the Cr and Cb input  
data by a factor programmed by the user. This factor allows the  
data to be scaled between 0% and 200%. (U Scale Register and  
V Scale Register.)  
The ADV7190/ADV7191 has a programmable clamp TTL  
output signal. This clamp signal is programmable to the front  
and back porch. The clamp signal can be varied by one to  
three clock cycles in a positive and negative direction from the  
default position. (Mode Register 5, Mode Register 7.)  
Hue Adjust Control  
The hue adjustment is achieved on the composite and chroma  
outputs by adding a phase offset onto the color subcarrier in the  
active video but leaving the color burst unmodified, i.e., only  
the phase between the video and the colorburst is modified and  
hence the hue is shifted. The ADV7190/ADV7191 provides a  
range of 22° in increments of 0.17578125°. (Hue Adjust  
Register.)  
CLAMP O/P SIGNALS  
CVBS  
OUTPUT PIN  
MR57 = 1  
MR57 = 0  
CLAMP  
OUTPUT PIN  
CHROMINANCE CONTROL  
The color information can be switched on and off the com-  
posite, chroma and color component video outputs. (Mode  
Register 4.)  
Figure 28. Clamp Output Timing  
CSO, HSO AND VSO OUTPUTS  
The ADV7190/ADV7191 supports three output timing sig-  
nals, CSO (Composite Sync Signal), HSO (Horizontal Sync  
Signal) and VSO (Vertical Sync Signal). These output TTL sig-  
nals are aligned with the analog video outputs. See Figure 29 for  
an example of these waveforms. (Mode Register 7.)  
UNDERSHOOT LIMITER  
A limiter is placed after the digital filters. This prevents any  
synchronization problems for TVs. The level of undershoot is  
programmable between –1.5 IRE, –6 IRE, –11 IRE when operat-  
ing in 4× Oversampling. In 2× Oversampling mode the limits are  
–7.5 IRE and 0 IRE. (Mode Register 9 and Timing Register 0.)  
EXAMPLE:- NTSC  
525  
1
2
3
4
5
6
7
8
9
10  
1119  
OUTPUT  
VIDEO  
DIGITAL NOISE REDUCTION  
DNR is applied to the Y data only. A filter block selects the  
high frequency, low amplitude components of the incoming  
signal (DNR Input Select). The absolute value of the filter output  
is compared to a programmable threshold value (DNR Thresh-  
old Control).  
CSO  
HSO  
VSO  
Figure 29. CSO, HSO, VSO Timing Diagram  
Two DNR modes are available: DNR Mode and DNR Sharp-  
ness Mode.  
REV. 0  
–17–