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ADV7180KST48Z-RL 参数 Datasheet PDF下载

ADV7180KST48Z-RL图片预览
型号: ADV7180KST48Z-RL
PDF下载: 下载PDF文件 查看货源
内容描述: 10位, 4A ?过采样SDTV视频解码器 [10-Bit, 4× Oversampling SDTV Video Decoder]
分类和应用: 解码器电视
文件页数/大小: 120 页 / 2118 K
品牌: ADI [ ADI ]
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Data Sheet  
ADV7180  
INTRODUCTION  
The ADV7180 is a versatile one-chip multiformat video decoder  
that automatically detects and converts PAL, NTSC, and SECAM  
standards in the form of composite, S-Video, and component  
video into a digital ITU-R BT.656 format.  
STANDARD DEFINITION PROCESSOR  
The ADV7180 is capable of decoding a large selection of baseband  
video signals in composite, S-Video, and component formats.  
The video standards supported by the video processor include  
PAL B/D/I/G/H, PAL 60, PAL M, PAL N, PAL Nc, NTSC M/J,  
NTSC 4.43, and SECAM B/D/G/K/L. The ADV7180 can  
The simple digital output interface connects gluelessly to a wide  
range of MPEG encoders, codecs, mobile video processors, and  
Analog Devices digital video encoders, such as the ADV7391.  
External HS, VS, and FIELD signals provide timing references  
for LCD controllers and other video ASICs that do not support the  
ITU-R BT.656 interface standard. The different package options  
available for the ADV7180 are shown in Table 2.  
automatically detect the video standard and process it accordingly.  
The ADV7180 has a five-line, superadaptive, 2D comb filter  
that gives superior chrominance and luminance separation  
when decoding a composite video signal. This highly adaptive filter  
automatically adjusts its processing mode according to the video  
standard and signal quality without requiring user intervention.  
Video user controls such as brightness, contrast, saturation, and  
hue are also available with the ADV7180.  
ANALOG FRONT END  
The ADV7180 analog front end comprises a single high speed,  
10-bit analog-to-digital converter (ADC) that digitizes the  
analog video signal before applying it to the standard definition  
processor. The analog front end employs differential channels to  
the ADC to ensure high performance in mixed-signal applications.  
The ADV7180 implements a patented ADLLT™ algorithm to  
track varying video line lengths from sources such as a VCR.  
ADLLT enables the ADV7180 to track and decode poor quality  
video sources such as VCRs and noisy sources from tuner outputs,  
VCD players, and camcorders. The ADV7180 contains a chroma  
transient improvement (CTI) processor that sharpens the edge  
rate of chroma transitions, resulting in sharper vertical transitions.  
The front end also includes a 3-channel input mux that enables  
multiple composite video signals to be applied to the ADV7180.  
Current clamps are positioned in front of the ADC to ensure  
that the video signal remains within the range of the converter.  
A resistor divider network is required before each analog input  
channel to ensure that the input signal is kept within the range  
of the ADC (see Figure 27). Fine clamping of the video signal  
is performed downstream by digital fine clamping within the  
ADV7180.  
The video processor can process a variety of VBI data services,  
such as closed captioning (CCAP), wide screen signaling (WSS),  
copy generation management system (CGMS), EDTV, Gemstar®  
1×/2×, and extended data service (XDS). Teletext data slicing  
for world standard teletext (WST), along with program delivery  
control (PDC) and video programming service (VPS), are  
provided. Data is transmitted via the 8-bit video output port as  
ancillary data packets (ANC). The ADV7180 is fully Macrovision®  
certified; detection circuitry enables Type I, Type II, and Type III  
protection levels to be identified and reported to the user. The  
decoder is also fully robust to all Macrovision signal inputs.  
Table 1 shows the three ADC clocking rates that are determined by  
the video input format to be processed—that is, INSEL[3:0].  
These clock rates ensure 4× oversampling per channel for CVBS  
mode and 2× oversampling per channel for Y/C and YPrPb modes.  
Table 1. ADC Clock Rates  
Oversampling  
Rate per Channel  
Input Format  
CVBS  
ADC Clock Rate (MHz)1  
57.27  
86  
86  
4×  
2×  
2×  
Y/C (S-Video)2  
YPrPb  
1 Based on a 28.6363 MHz crystal between the XTAL and XTAL1 pins.  
2 See INSEL[3:0] in Table 107 for the mandatory write for Y/C (S-Video) mode.  
Table 2. ADV7180 Selection Guide  
Part Number  
Package Type  
32-lead LFCSP  
32-lead LFCSP  
40-lead LFCSP  
40-lead LFCSP  
64-lead LQFP  
64-lead LQFP  
48-lead LQFP  
Analog Inputs  
Digital Outputs  
8-bit  
8-bit  
8-bit  
8-bit  
8-bit/16-bit  
8-bit/16-bit  
8-bit  
Temperature Grade  
−10°C to +70°C  
−40°C to +85°C  
−40°C to +85°C  
−40°C to +125°C  
−40°C to +85°C  
−40°C to +125°C  
−40°C to +85°C  
ADV7180KCP32Z  
ADV7180WBCP32Z (Automotive)1  
ADV7180BCPZ  
ADV7180WBCPZ (Automotive)1  
ADV7180BSTZ  
ADV7180WBSTZ (Automotive)1  
ADV7180WBST48Z (Automotive)1  
3
3
3
3
6
6
6
1 Automotive qualification completed.  
Rev. G | Page 5 of 120  
 
 
 
 
 
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