ADuM5401/ADuM5402/ADuM5403/ADuM5404
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
3.0 V ≤ V
DD1
≤ 3.6 V, V
SEL
= GND
ISO
; all voltages are relative to their respective ground. All minimum/maximum specifications apply over
the entire recommended operating range, unless otherwise noted. All typical specifications are at T
A
= 25°C, V
DD1
= 3.3 V, V
ISO
= 3.3 V,
V
SEL
= GND
ISO
.
Table 2.
Parameter
DC-TO-DC CONVERTER POWER SUPPLY
Setpoint
Line Regulation
Load Regulation
Output Ripple
Output Noise
Switching Frequency
Pulse-Width Modulation Frequency
iCoupler
DATA CHANNELS
DC to 2 Mbps Data Rate
Maximum Output Supply Current
Efficiency at Maximum Output Supply
Current
I
DD1
Supply Current, No V
ISO
Load
25 Mbps Data Rate (CRWZ Grade Only)
I
DD1
Supply Current, No V
ISO
Load
ADuM5401
ADuM5402
ADuM5403
ADuM5404
Available V
ISO
Supply Current
ADuM5401
ADuM5402
ADuM5403
ADuM5404
I
DD1
Supply Current, Full V
ISO
Load
I/O Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Symbol
V
ISO
V
ISO(LINE)
V
ISO(LOAD)
V
ISO(RIP)
V
ISO(N)
f
OSC
f
PWM
Min
3.0
Typ
3.3
1
1
50
130
180
625
Max
3.6
5
Unit
V
mV/V
%
mV p-p
mV p-p
MHz
kHz
Test Conditions/Comments
I
ISO
= 0 mA
I
ISO
= 37.5 mA, V
DD1
= 3.0 V to 3.6 V
I
ISO
= 6 mA to 54 mA
20 MHz bandwidth, C
BO
= 0.1 μF║10 μF,
I
ISO
= 54 mA
20 MHz bandwidth, C
BO
= 0.1 μF║10 μF,
I
ISO
= 54 mA
I
ISO(MAX)
60
36
mA
%
20
mA
f ≤ 1 MHz, V
ISO
> 3.0 V
I
ISO
= I
ISO(2,max)
, f ≤ 1 MHz
I
ISO
= 0 mA, f ≤ 1 MHz
I
DD1(Q)
I
DD1(D)
14
44
46
47
51
I
ISO(LOAD)
42
41
39
38
175
+0.01
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
0.1
0.4
V
V
I
ISO
= 0 mA, C
L
= 15 pF, f = 12.5 MHz
I
ISO
= 0 mA, C
L
= 15 pF, f = 12.5 MHz
I
ISO
= 0 mA, C
L
= 15 pF, f = 12.5 MHz
I
ISO
= 0 mA, C
L
= 15 pF, f = 12.5 MHz
C
L
= 15 pF, f = 12.5 MHz
C
L
= 15 pF, f = 12.5 MHz
C
L
= 15 pF, f = 12.5 MHz
C
L
= 15 pF, f = 12.5 MHz
C
L
= 0 pF, f = 0 MHz, V
DD
= 3.3 V, I
ISO
= 60 mA
I
DD1(MAX)
I
IA
, I
IB
, I
IC
, I
ID
V
IH
V
IL
V
OAH
, V
OBH
,
V
OCH
, V
ODH
−10
0.7 × V
ISO
,
0.7 × V
IDD1
+10
0.3 × V
ISO
,
0.3 × V
IDD1
V
DD1
− 0.2,
V
ISO
− 0.2
V
DD1
− 0.5,
V
1SO
− 0.5
5.0
4.8
0.0
0.0
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
I
Ox
= 20 μA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
Logic Low Output Voltages
V
OAL
, V
OBL
,
V
OCL
, V
ODL
AC SPECIFICATIONS
ADuM5401ARWZ/ADuM5402ARWZ/
ADuM5403ARWZ/ADuM5404ARWZ
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
PLH
− t
PHL
|
Propagation Delay Skew
Channel-to-Channel Matching
PW
1
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
/t
PSKOD
60
1000
100
40
50
50
ns
Mbps
ns
ns
ns
ns
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
Rev. 0 | Page 5 of 24
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