ADuM1400/ADuM1401/ADuM1402
Parameter
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
5 V/3 V Operation
3 V/5 V Operation
V
DD2
Supply Current
5 V/3 V Operation
3 V/5 V Operation
ADuM1402, Total Supply Current, Four Channels
DC to 2 Mbps
V
DD1
Supply Current
5 V/3 V Operation
3 V/5 V Operation
V
DD2
Supply Current
5 V/3 V Operation
3 V/5 V Operation
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current
5 V/3 V Operation
3 V/5 V Operation
V
DD2
Supply Current
5 V/3 V Operation
3 V/5 V Operation
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
5 V/3 V Operation
3 V/5 V Operation
V
DD2
Supply Current
5 V/3 V Operation
3 V/5 V Operation
For All Models
Input Currents
Logic High Input Threshold
5 V/3 V Operation
3 V/5 V Operation
Logic Low Input Threshold
5 V/3 V Operation
3 V/5 V Operation
Logic High Output Voltages
Symbol
I
DD1 (90)
62
34
I
DD2 (90)
19
35
27
43
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
82
52
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
Min
Typ
Max Unit
Test Conditions
I
DD1 (Q)
1.5
0.9
I
DD2 (Q)
0.9
1.5
I
DD1 (10)
5.6
3.0
I
DD2 (10)
3.0
5.6
I
DD1 (90)
49
27
I
DD2 (90)
27
49
I
IA
, I
IB
, I
IC
,
I
ID
, I
E1
, I
E2
V
IH
, V
EH
–10
+0.01
39
62
+10
mA
mA
µA
45 MHz logic signal freq.
45 MHz logic signal freq.
0 ≤ V
IA
,V
IB
, V
IC
,V
ID
≤ V
DD1
or
V
DD2
, 0 ≤ V
E1
,V
E2
≤ V
DD1
or V
DD2
62
39
mA
mA
45 MHz logic signal freq.
45 MHz logic signal freq.
4.2
7.0
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
7.0
4.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
1.5
2.1
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
2.1
1.5
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
2.0
1.6
V
IL
, V
EL
0.8
0.4
V
OAH
, V
OBH
,
V
OCH
, V
ODH
V
DD1
/
V
DD2
– 0.1
V
DD1
/
V
DD2
– 0.4
V
DD1/
V
DD2
V
DD1
/
V
DD2
– 0.2
0.0
0.04
0.2
V
V
V
V
V
V
0.1
0.1
0.4
V
V
V
I
Ox
= –20 µA, V
Ix
= V
IxH
I
Ox
= –4 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
Logic Low Output Voltages
V
OAL,
V
OBL,
V
OCL
, V
ODL
SWITCHING SPECIFICATIONS
ADuM140xARW
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse-Width Distortion, |t
PLH
– t
PHL
Propagation Delay Skew
Channel-to-Channel Matching
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD/OD
1
50
70
1000 ns
Mbps
100 ns
40
ns
50
ns
50
ns
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
Rev. B | Page 9 of 24
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