ADuM1400/ADuM1401/ADuM1402
ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION
2.7 V ≤ V
DD1
≤ 3.6 V, 2.7 V ≤ V
DD2
≤ 3.6 V; all minimum/maximum specifications apply over the entire recommended operation range,
unless otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.0 V. These specifications do not apply to ADuM1400W,
ADuM1401W, and ADuM1402W automotive grade versions.
Table 2.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1400 Total Supply Current, Four Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
ADuM1401 Total Supply Current, Four Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BRW and CRW Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
90 Mbps (CRW Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
ADuM1402 Total Supply Current, Four Channels
DC to 2 Mbps
V
DD1
or V
DD2
Supply Current
10 Mbps (BRW and CRW Grades Only)
V
DD1
or V
DD2
Supply Current
90 Mbps (CRW Grade Only)
V
DD1
or V
DD2
Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Symbol
I
DDI (Q)
I
DDO (Q)
Min
Typ
0.26
0.11
Max Unit
0.31
0.14
mA
mA
Test Conditions
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (90)
I
DD2 (90)
1.2
0.5
4.5
1.4
37
11
1.9
0.9
6.5
2.0
65
15
mA
mA
mA
mA
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (90)
I
DD2 (90)
1.0
0.7
3.7
2.2
30
18
1.6
1.2
5.4
3.0
52
27
mA
mA
mA
mA
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
45 MHz logic signal freq.
45 MHz logic signal freq.
I
DD1 (Q)
, I
DD2 (Q)
I
DD1 (10)
, I
DD2 (10)
I
DD1 (90)
, I
DD2 (90)
I
IA
, I
IB
, I
IC
,
I
ID
, I
E1
, I
E2
V
IH
, V
EH
V
IL
, V
EL
V
OAH
, V
OBH
,
V
OCH
, V
ODH
V
OAL
, V
OBL
,
V
OCL
, V
ODL
−10
1.6
0.9
3.0
24
1.5
4.2
39
mA
mA
mA
μA
V
V
V
V
V
V
V
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
45 MHz logic signal freq.
0 V ≤ V
IA
, V
IB
, V
IC
, V
ID
≤ V
DD1
or V
DD2
,
0 V ≤ V
E1
, V
E2
≤ V
DD1
or V
DD2
+0.01 +10
0.4
(V
DD1
or V
DD2
) − 0.1
(V
DD1
or V
DD2
) − 0.4
3.0
2.8
0.0
0.04
0.2
0.1
0.1
0.4
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
I
Ox
= 20 μA, V
Ix
= V
IxL
I
Ox
= 400 μA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ADuM140xARW
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
PLH
− t
PHL
Change vs. Temperature
Propagation Delay Skew
Channel-to-Channel Matching
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
/t
PSKOD
Rev. G | Page 6 of 32
1
50
75
11
1000 ns
Mbps
100 ns
40
ns
ps/°C
50
ns
50
ns
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels