ADuM1200/ADuM1201
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION
Data Sheet
All voltages are relative to their respective ground; 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V; this
does not apply to the ADuM1200W and ADuM1201W automotive grade products.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1200 Total Supply Current, Two Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
25 Mbps (CR Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
ADuM1201 Total Supply Current, Two Channels
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
25 Mbps (CR Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Symbol
I
DDI (Q)
I
DDO (Q)
Min
Typ
0.50
0.19
Max
0.60
0.25
Unit
mA
mA
Test Conditions
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (25)
I
DD2 (25)
1.1
0.5
4.3
1.3
10
2.8
1.4
0.8
5.5
2.0
13
3.4
mA
mA
mA
mA
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (25)
I
DD2 (25)
I
IA
, I
IB
V
IH
V
IL
V
OAH
, V
OBH
V
OAL
, V
OBL
−10
0.7 (V
DD1
or V
DD2
)
(V
DD1
or V
DD2
) − 0.1
(V
DD1
or V
DD2
) − 0.5
0.8
0.8
2.8
2.8
6.3
6.3
+0.01
1.1
1.1
3.5
3.5
8.0
8.0
+10
0.3 (V
DD1
or V
DD2
)
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
0 V ≤ V
IA
, V
IB
≤ (V
DD1
or V
DD2
)
5.0
4.8
0.0
0.04
0.2
0.1
0.1
0.4
I
Ox
= −20 μA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
I
Ox
= 20 μA, V
Ix
= V
IxL
I
Ox
= 400 μA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
C
L
= 15 pF, CMOS signal levels
SWITCHING SPECIFICATIONS
ADuM120xAR
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
PLH
− t
PHL
Change vs. Temperature
Propagation Delay Skew
Channel-to-Channel Matching
Output Rise/Fall Time (10% to 90%)
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
/t
PSKOD
t
R
/t
F
1
50
11
1000
150
40
100
50
10
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
Rev. I | Page 4 of 28
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