Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
DETAILED BLOCK DIAGRAM
8
72 71 67 73 74
53 26 25 54
28 27 37
75 70 69
12-BIT
ADuC7026*
10 DAC0*/ADC12
11 DAC1*/ADC13
12 DAC2*/ADC14
13 DAC3*/ADC15
VOLTAGE
BUF
BUF
BUF
BUF
ADC0 77
ADC1 78
OUTPUT DAC
12-BIT SAR
ADC 1MSPS
ADC
CONTROL
ADC2/CMP0 79
ADC3/CMP1 80
12-BIT
VOLTAGE
OUTPUT DAC
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10
1
2
3
4
5
6
7
DAC
CONTROL
12-BIT
VOLTAGE
MUX
OUTPUT DAC
12-BIT
VOLTAGE
OUTPUT DAC
ADC11 76
ADCNEG
TEMP
SENSOR
29 P3.0/AD0/PWM0 /PLAI[8]
H
9
62kB FLASH/EE
(31k × 16 BITS)
30 P3.1/AD1/PWM0 /PLAI[9]
L
31 P3.2/AD2/PWM1 /PLAI[10]
H
32 P3.3/AD3/PWM1 /PLAI[11]
L
ARM7TDMI
3-PHASE
PWM
8192 BYTES USER RAM
(2k × 32 BITS)
MUX
38 P3.4/AD4/PWM2 /PLAI[12]
H
CMP
/IRQ
WAKE-UP/
RTC TIMER
MCU
CORE
DAC
OUT
39 P3.5/AD5/PWM2 /PLAI[13]
L
BM/P0.0/CMP
/PLAI[7]/MS0 20
OUT
46 P3.6/AD6/PWM
47 P3.7/AD7/PWM
/PLAI[14]
/PLAI[15]
TRIP
POWER SUPPLY
MONITOR
DOWNLOADER
SYNC
V
68
V
REF
REF
OSC
BAND GAP
REFERENCE
44 XCLKO
45 XCLKI
PROG. CLOCK
DIVIDER
PLL
43 P0.7/ECLK/XCLK/SPM8/PLAO[4]
2
SPI/I C SERIAL
INTERFACE
UART
SERIAL PORT
P4.6/AD14/PLAO[14] 18
P4.7/AD15/PLAO[15] 19
PROG. LOGIC
ARRAY
40 IRQ0/P0.4/PWM
41 IRQ1/P0.5/ADC
/PLAO[1]/MS1
/PLAO[2]/MS2
TRIP
INTERRUPT
POR
21
CONTROLLER
BUSY
SERIAL PORT MULTIPLEXER
55 56 63 64 65 66 62 61 60 59 58 57 52 51
42
14 15 23 22 34
49 50 17 33 35 36 48 24 16
* SEE ORDERING GUIDE FOR
FEATURE AVAILABILITY ON
DIFFERENT MODELS.
Figure 11.
Rev. F | Page 9 of 104
ADI [ ADI ]
