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ADSP-BF532 参数 Datasheet PDF下载

ADSP-BF532图片预览
型号: ADSP-BF532
PDF下载: 下载PDF文件 查看货源
内容描述: Blackfin嵌入式处理器 [Blackfin Embedded Processor]
分类和应用:
文件页数/大小: 56 页 / 672 K
品牌: ADI [ ADI ]
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ADSP-BF531/ADSP-BF532/ADSP-BF533  
• Set conditional breakpoints on registers, memory,  
and stacks.  
lator provides full speed emulation, allowing inspection and  
modification of memory, registers, and processor stacks. Non-  
intrusive in-circuit emulation is assured by the use of the  
processor’s JTAG interface—the emulator does not affect target  
system loading or timing.  
• Trace instruction execution.  
• Perform linear or statistical profiling of program execution.  
• Fill, dump, and graphically plot the contents of memory.  
• Perform source level debugging.  
In addition to the software and hardware development tools  
available from Analog Devices, third parties provide a wide  
range of tools supporting the Blackfin processor family. Hard-  
ware tools include Blackfin processor PC plug-in cards. Third  
party software tools include DSP libraries, real-time operating  
systems, and block diagram design tools.  
• Create custom debugger windows.  
The VisualDSP++ IDDE lets programmers define and manage  
software development. Its dialog boxes and property pages let  
programmers configure and manage all of the Blackfin develop-  
ment tools, including the color syntax highlighting in the  
VisualDSP++ editor. This capability permits programmers to:  
DESIGNING AN EMULATOR COMPATIBLE  
PROCESSOR BOARD  
• Control how the development tools process inputs and  
generate outputs.  
The Analog Devices family of emulators are tools that every sys-  
tem developer needs to test and debug hardware and software  
systems. Analog Devices has supplied an IEEE 1149.1 JTAG  
Test Access Port (TAP) on each JTAG processor. The emulator  
uses the TAP to access the internal features of the processor,  
allowing the developer to load code, set breakpoints, observe  
variables, observe memory, and examine registers. The proces-  
sor must be halted to send data and commands, but once an  
operation has been completed by the emulator, the processor  
system is set running at full speed with no impact on system  
timing.  
• Maintain a one-to-one correspondence with the tool’s  
command line switches.  
The VisualDSP++ Kernel (VDK) incorporates scheduling and  
resource management tailored specifically to address the mem-  
ory and timing constraints of DSP programming. These  
capabilities enable engineers to develop code more effectively,  
eliminating the need to start from the very beginning, when  
developing new application code. The VDK features include  
Threads, Critical and Unscheduled regions, Semaphores,  
Events, and Device flags. The VDK also supports Priority-based,  
Preemptive, Cooperative, and Time-Sliced scheduling  
To use these emulators, the target board must include a header  
that connects the processor’s JTAG port to the emulator.  
approaches. In addition, the VDK was designed to be scalable. If  
the application does not use a specific feature, the support code  
for that feature is excluded from the target system.  
For details on target board design issues including mechanical  
layout, single processor connections, multiprocessor scan  
chains, signal buffering, signal termination, and emulator pod  
logic, see the EE-68: Analog Devices JTAG Emulation Technical  
Reference on the Analog Devices web site (www.analog.com)—  
use site search on “EE-68.” This document is updated regularly  
to keep pace with improvements to emulator support.  
Because the VDK is a library, a developer can decide whether to  
use it or not. The VDK is integrated into the VisualDSP++  
development environment, but can also be used via standard  
command line tools. When the VDK is used, the development  
environment assists the developer with many error-prone tasks  
and assists in managing system resources, automating the gen-  
eration of various VDK based objects, and visualizing the  
system state, when debugging an application that uses the VDK.  
VCSE is Analog Devices technology for creating, using, and  
reusing software components (independent modules of sub-  
stantial functionality) to quickly and reliably assemble software  
applications. Download components from the Web and drop  
them into the application. Publish component archives from  
within VisualDSP++. VCSE supports component implementa-  
tion in C/C++ or assembly language.  
Use the Expert Linker to visually manipulate the placement of  
code and data on the embedded system. View memory utiliza-  
tion in a color-coded graphical form, easily move code and data  
to different areas of the processor or external memory with the  
drag of the mouse, examine run time stack and heap usage. The  
Expert Linker is fully compatible with existing Linker Definition  
File (LDF), allowing the developer to move between the graphi-  
cal and textual environments.  
Analog Devices emulators use the IEEE 1149.1 JTAG Test  
Access Port of the ADSP-BF531/2/3 processor to monitor and  
control the target board processor during emulation. The emu-  
Rev. 0  
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| March 2004