ADSP-BF531/ADSP-BF532
and hold specifications given should be derated by a factor
derived from these figures. The graphs in these figures may not
be linear outside the ranges shown.
ABE0 (133MHz DRIVER), VDDEXT (MAX) = 3.65V
12
10
8
RISE TIME
ABEB0 (133MHz DRIVER), V
RISE TIME
= 1.7V
DDEXT
16
14
12
10
8
FALL TIME
6
4
FALL TIME
2
6
0
0
50
100
150
200
250
4
2
0
LOAD CAPACITANCE (pF)
Figure 45. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
for Driver A at VDDEXT = 3.65 V
0
50
100
150
200
250
LOAD CAPACITANCE (pF)
CLKOUT (CLKOUT DRIVER), V
DDEXT
= 1.7V
14
12
10
8
Figure 43. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
for Driver A at VDDEXT = 1.8 V
ABE_B0 (133MHz DRIVER), VDDEXT (MIN) = 2.25V
RISE TIME
14
12
RISE TIME
FALL TIME
10
6
FALL TIME
8
4
6
4
2
0
0
50
100
150
200
250
2
0
LOAD CAPACITANCE (pF)
Figure 46. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
for Driver B at VDDEXT = 1.8 V
0
50
100
150
200
250
LOAD CAPACITANCE (pF)
Figure 44. Typical Rise and Fall Times (10% to 90%) versus Load Capacitance
for Driver A at VDDEXT = 2.25 V
Rev. D
|
Page 46 of 60
|
August 2006