ADR440/ADR441/ADR443/ADR444/ADR445
THEORY OF OPERATION
POWER DISSIPATION CONSIDERATIONS
The ADR44x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low dropout, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified
and used to form a highly stable voltage reference.
The ADR44x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 3 V to
18 V. When these devices are used in applications at higher
currents, users should use the following equation to account for
the temperature effects of increases in power dissipation:
TJ =PD × θJA + TA
where:
(2)
TJ and TA are the junction and ambient temperatures,
respectively.
PD is the device power dissipation.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon, and it can
be closely compensated for by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The advantage
of an XFET reference is its correction term, which is approx-
imately 20 times lower and requires less correction than that of a
band gap reference. Because most of the noise of a band gap
reference comes from the temperature compensation circuitry,
the XFET results in much lower noise.
θJA is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
The ADR44x family requires a 0.1 μF capacitor on the input
and the output for stability. While not required for operation,
a 10 μF capacitor at the input can help with line voltage
transient performance.
ADR440/
ADR441/
ADR443/
ADR444/
ADR445
TP
1
2
3
4
8
7
6
5
TP
Figure 33 shows the basic topology of the ADR44x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute temperature.
The general equation is
V
IN
NC
+
V
OUT
10µF
0.1µF
NC
GND
TOP VIEW
(Not to Scale)
0.1µF
TRIM
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
VOUT = G ΔVP −R1× IPTAT
(1)
where:
Figure 34. Basic Voltage Reference Configuration
G is the gain of the reciprocal of the divider ratio.
ꢀVP is the difference in pinch-off voltage between the two JFETs.
NOISE PERFORMANCE
The noise generated by the ADR44x family of references is
typically less than 1.4 μV p-p over the 0.1 Hz to 10.0 Hz band
for ADR440, ADR441, and ADR443. Figure 26 shows the 0.1 Hz
to 10 Hz noise of the ADR441, which is only 1.2 μV p-p. The
noise measurement is made with a band-pass filter made of a
2pole high-pass filter with a corner frequency at 0.1 Hz and a
2pole low-pass filter with a corner frequency at 10.0 Hz.
I
PTAT is the positive temperature coefficient correction current.
ADR44x devices are created by on-chip adjustment of R2
and R3 to achieve the different voltage option at the
reference output.
V
IN
I
I
I
PTAT
1
1
TURN-ON TIME
V
ADR44x
OUT
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two compo-
nents normally associated with this are the time for the active
circuits to settle and the time for the thermal gradients on the
chip to stabilize. Figure 20 and Figure 21 show the turn-on and
turn-off settling times for the ADR441.
R2
R3
*
ΔV
P
R1
*EXTRA CHANNEL IMPLANT
= G (ΔV – R1 × I
V
)
OUT
P
PTAT
GND
Figure 33. Simplified Schematic Device
Rev. A | Page 14 of 20
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