ADM706P/ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/ADM708T
3.3V
POWER-FAIL COMPARATOR
INPUT
POWER
ADM663A
The power-fail comparator is an independent comparator that
can be used to monitor the input power supply. The inverting
input of the comparator is internally connected to a 1.25 V
reference voltage. The noninverting input is available at the PFI
input. This input is used to monitor the input power supply via
a resistive divider network. When the voltage on the PFI input
V
CC
R1
TO MICROPROCESSOR NMI
1.25V
–
PFO
+
PFI
R2
ADM706P/ADM706R/
ADM706S/ADM706T/
ADM708R/ADM708S/
ADM708T
PFO
drops below 1.25 V, the comparator output (
) goes low,
R3
indicating a power failure. For early warning of power failure,
the comparator is used to monitor the preregulator input simply
3.3V
PFO
PFO
by choosing an appropriate resistive divider network. The
output is used to interrupt the processor so that a shutdown
procedure is implemented before the power is lost.
INPUT
POWER
0V
0V
V
H
V
L
1.25V
V
R1
R2
PFO
IN
POWER-FAIL
OUTPUT
Figure 18. Adding Hysteresis to the Power-Fail Comparator
POWER-FAIL PFI
INPUT
ADM706P/ADM706R/
ADM706S/ADM706T/
ADM708R/ADM708S/
ADM708T
⎡
⎤
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
R2 + R3
R2 × R3
VH = 1.25 ⎢1 +
R1⎥
⎢
⎣
⎥
⎦
VCC − 1.25
1.25
R2
⎛
⎜
⎞
⎟
V = 1.25 + R1
−
L
R3
Figure 17. Power-Fail Comparator
⎝
⎠
R1 + R2
R2
⎛
⎜
⎞
⎟
ADDING HYSTERESIS TO THE POWER-FAIL
COMPARATOR
VMID = 1.25
⎝
⎠
For increased noise immunity, hysteresis can be added to the
power-fail comparator. Because the comparator circuit is
noninverting, hysteresis is added simply by connecting a resistor
VALID RESET BELOW 1 V VCC
The ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/
ADM708T are guaranteed to provide a valid reset level with VCC
as low as 1 V. Refer to the Typical Performance Characteristics
section. As VCC drops below 1 V, the internal transistor does not
have sufficient drive to hold it on so the voltage on
longer held at 0 V. A pull-down resistor, as shown in Figure 19, can
be connected externally to hold the line low if it is required.
PFO
between the
output and the PFI input as shown in Figure 18.
is low, Resistor R3 sinks current from the summing
PFO
PFO
When
junction at the PFI pin. When
is high, Resistor R3 sources
RESET
is no
current into the PFI summing junction. This results in differing
trip levels for the comparator. Further noise immunity is achieved
by connecting a capacitor between PFI and GND.
ADM706R/ADM706S/
ADM706T/ADM708R/
ADM708S/ADM708T
RESET
GND
R1
RESET
Figure 19.
Valid Below 1 V
Rev. C | Page 11 of 16
ADI [ ADI ]
