ADM660/ADM8660
160
140
120
100
80
60
40
20
0
–40
LV = GND
FC = V+
C1, C2 = 2.2µF
60
CHARGE-PUMP FREQUENCY – kHz
OUTPUT SOURCE RESISTANCE –
Ω
50
40
30
V+ = +1.5V
20
V+ = +3V
10
V+ = +5V
–20
0
20
40
60
TEMPERATURE –
°C
80
100
0
–40
–20
0
20
40
60
TEMPERATURE –
°C
80
100
Figure 13. Charge-Pump Frequency vs. Temperature
GENERAL INFORMATION
Figure 14. Output Resistance vs. Temperature
Switched Capacitor Theory of Operation
The ADM660/ADM8660 is a switched capacitor voltage con-
verter that can be used to invert the input supply voltage. The
ADM660 can also be used in a voltage doubling mode. The
voltage conversion task is achieved using a switched capacitor
technique using two external charge storage capacitors. An on-
board oscillator and switching network transfers charge between
the charge storage capacitors. The basic principle behind the
voltage conversion scheme is illustrated in Figures 15 and 16.
S1
V+
S2
C1
CAP–
Φ1
÷
2
OSCILLATOR
Φ2
S4
OUT = –V+
C2
CAP+
S3
As already described, the charge pump on the ADM660/
ADM8660 uses a switched capacitor technique in order to
invert or double the input supply voltage. Basic switched
capacitor theory is discussed below.
A switched capacitor building block is illustrated in Figure 17.
With the switch in position A, capacitor C1 will charge to volt-
age V1. The total charge stored on C1 is q1 = C1V1. The
switch is then flipped to position B discharging C1 to voltage
V2. The charge remaining on C1 is q2 = C1V2. The charge
transferred to the output V2 is, therefore, the difference be-
tween q1 and q2, so
∆q
= q1–q2 = C1 (V1–V2).
A
V1
C2
C1
R
L
B
V2
Figure 15. Voltage Inversion Principle
S1
V+
S2
C1
CAP–
Φ1
÷
2
OSCILLATOR
Φ2
S4
V+
C2
CAP+
S3
V
OUT
= 2V+
Figure 17. Switched Capacitor Building Block
As the switch is toggled between A and B at a frequency f, the
charge transfer per unit time or current is
I
=
f
(∆q)
=
f
(C1)(V1 –
V
2)
Therefore
I
=
(V1 –
V
2)/(1 /
fC1)
=
(V1 –
V
2)/(R
EQ
)
where
R
EQ
= 1/fC1
The switched capacitor may, therefore, be replaced by an
equivalent resistance whose value is dependent on both the
capacitor size and the switching frequency. This explains why
lower capacitor values may be used with higher switching fre-
quencies. It should be remembered that as the switching fre-
quency is increased the power consumption will increase due to
some charge being lost at each switching cycle. As a result, at high
frequencies the power efficiency starts decreasing. Other losses
include the resistance of the internal switches and the equivalent
series resistance (ESR) of the charge storage capacitors.
R
EQ
V1
C2
R
EQ
= 1/fC1
R
L
V2
Figure 16. Voltage Doubling Principle
Figure 15 shows the voltage inverting configuration, while Figure
16 shows the configuration for voltage doubling. An oscillator
generating antiphase signals
φ1
and
φ2
controls switches S1, S2
and S3, S4. During
φ1,
switches S1 and S2 are closed charging
C1 up to the voltage at V+. During
φ2,
S1 and S2 open and S3
and S4 close. With the voltage inverter configuration during
φ2,
the positive terminal of C1 is connected to GND via S3 and the
negative terminal of C1 connects to V
OUT
via S4. The net result
is voltage inversion at V
OUT
wrt GND. Charge on C1 is trans-
ferred to C2 during
φ2.
Capacitor C2 maintains this voltage
during
φ1.
The charge transfer efficiency depends on the on-
resistance of the switches, the frequency at which they are being
switched and also on the equivalent series resistance (ESR) of
the external capacitors. The reason for this is explained in the
following section. For maximum efficiency, capacitors with low
ESR are, therefore, recommended.
The voltage doubling configuration reverses some of the con-
nections but the same principle applies.
Figure 18. Switched Capacitor Equivalent Circuit
–6–
REV. A
AD [ ANALOG DEVICES ]
