ADM3485E
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
ADM3485E
B
TOP VIEW
A
(Not to Scale)
GND
Figure 2. SOIC_N Pin Configuration (R-8)
Table 5. Pin Function Descriptions
Pin
Mnemonic Number
Description
RO
RE
1
2
Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low.
Receiver Output Enable. With RE low, the receiver output (RO) is enabled. With RE high, the output goes into a
high impedance state. If RE is high and DE is low, the ADM3485E enters a shutdown state.
DE
DI
3
4
Driver Output Enable. A high level enables the driver differential outputs A and B. A low level places it in a high
impedance state.
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI
forces A high and B low.
GND
A
B
5
6
7
8
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver Output A.
Inverting Receiver Input B/Driver Output B.
Power Supply, 3.3 V 0.3 V.
VCC
Rev. D | Page 6 of 16
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