ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
RO
2
14
13
V
CC
V
CC
A
RO
1
RE
2
DE
3
DI
4
ADM3483/
ADM3485
TOP VIEW
(Not to Scale)
8
7
6
5
V
CC
B
05524-028
V
CC 1
RO
2
DI
3
GND
4
ADM3488/
ADM3490
TOP VIEW
(Not to Scale)
8
7
6
5
A
B
05524-029
RE
3
ADM3491
12
A
GND
Z
Y
TOP VIEW
DE
4
11
B
(Not to Scale)
10
Z
DI
5
GND
6
GND
7
9
8
Y
05524-030
NC
NC = NO CONNECT
Figure 4. ADM3483/ADM3485 Pin Configuration
Figure 5. ADM3488/ADM3490 Pin Configuration
Figure 6. ADM3491 Pin Configuration
Table 7. Pin Function Descriptions
ADM3483/ADM3485
Pin No.
1
2
ADM3488/ADM3490
Pin No.
2
N/A
ADM3491
Pin No.
2
3
Mnemonic
RO
RE
Description
Receiver Output. When enabled, if A > B by 200 mV, then
RO = high. If A < B by 200 mV, then RO = low.
Receiver Output Enable. A low level enables the receiver
output, RO. A high level places it in a high impedance
state. If RE is high and DE is low, the device enters a low
power shutdown mode.
Driver Output Enable. A high level enables the driver differential
Output A and Output B. A low level places it in a high impedance
state. If RE is high and DE is low, the device enters a low power
shutdown mode.
Driver Input. With a half-duplex part when the driver is enabled, a
logic low on DI forces A low and B high while a logic high on
DI forces A high and B low. With a full-duplex part when the
driver is enabled, a logic low on DI forces Y low and Z high
while a logic high on DI forces Y high and Z low.
Ground.
Noninverting Driver Output.
Inverting Driver Output.
Noninverting Receiver Input A and Noninverting Driver
Output A.
Noninverting Receiver Input A.
Inverting Receiver Input B and Inverted Driver Output B.
Inverting Receiver Input B.
Power Supply (3.3 V ± 0.3 V).
No Connect.
3
N/A
4
DE
4
3
5
DI
5
N/A
N/A
6
N/A
7
N/A
8
N/A
4
5
6
N/A
8
N/A
7
1
N/A
6, 7
9
10
N/A
12
N/A
11
13, 14
1, 8
GND
Y
Z
A
A
B
B
V
CC
NC
Rev. B | Page 8 of 20
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