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ADM3491EARZ 参数 Datasheet PDF下载

ADM3491EARZ图片预览
型号: ADM3491EARZ
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3 V , 【 15千伏ESD保护,半双工和全双工, RS - 485 / RS -422收发器 [3.3 V, 【15 kV ESD-Protected, Half- and Full-Duplex, RS-485/RS-422 Transceivers]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
文件页数/大小: 20 页 / 536 K
品牌: ADI [ ADI ]
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3.3 V, ± ±1 ꢀV ꢁESD-Proteotꢂ, ꢃHalD Hꢄꢂ  
FuaaDSupatx, RED481/RED422 TPHꢄsetivtPs  
ASM3483ꢁ/ASM3486ꢁ/ASM3488ꢁ/ASM3490ꢁ/ASM349±ꢁ  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
V
TIA/EIA RS-485/RS-422 compliant  
15 kV ESD protection on RS-485 input/output pins  
Data rates  
CC  
ADM3483E/  
ADM3486E  
ADM3483E/ADM3488E: 250 kbps  
ADM3486E: 2.5 Mbps  
ADM3490E/ADM3491E: 12 Mbps  
Half- and full-duplex options  
R
RO  
RE  
DE  
A
B
DI  
D
Up to 32 nodes on the bus  
Receiver open-circuit, fail-safe design  
Low power shutdown current  
GND  
(ADM3483E/ADM3486E/ADM3491E only)  
Outputs high-Z when disabled or powered off  
Common-mode input range: −7 V to +12 V  
Thermal shutdown and short-circuit protection  
Industry-standard 75176 pinout  
8-lead and 14-lead narrow SOIC packages  
Figure 1.  
V
CC  
ADM3488E/  
ADM3490E  
A
B
R
RO  
DI  
APPLICATIONS  
Power/energy metering  
Telecommunications  
EMI-sensitive systems  
Industrial control  
Z
Y
D
GND  
Figure 2.  
Local area networks  
V
CC  
GENERAL DESCRIPTION  
The ADM3483E/ADM3486E/ADM3488E/ADM3490E/  
ADM3491E are 3.3 V, low power data transceivers with  
1ꢀ ꢁV EꢂD protection suitable for full- and half-duplex  
communication on multipoint bus transmission lines. They  
are designed for balanced data transmission, and they  
comply with TIA/EIA standards Rꢂ­48ꢀ and Rꢂ-422. The  
ADM3483E/ADM3486E are half-duplex transceivers that  
share differential lines and have separate enable inputs for  
the driver and receiver. The full-duplex ADM3488E/  
ADM3490E/ADM3491E transceivers have dedicated  
differential line driver outputs and receiver inputs. The  
ADM3491E also features separate enable inputs for the  
driver and receiver.  
ADM3491E  
A
B
R
RO  
RE  
DE  
Z
Y
DI  
D
GND  
Figure 3.  
The devices have a 12 ꢁΩ receiver input impedance,  
which allows up to 32 transceivers on a bus. Because only  
one driver should be enabled at any time, the output of a  
disabled or powered-down driver is tristated to avoid  
overloading the bus.  
(continued on Page 3)  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.