ADM2485
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
D1
1
D2
2
GND
1 3
V
DD1 4
RxD
5
RE
6
RTS
7
TxD
8
16
15
V
DD2
GND
2
GND
2
B
A
GND
2
GND
2
06021-002
ADM2485
TOP VIEW
(Not to Scale)
14
13
12
11
10
9
DE OUT
Figure 6. Pin Configuration
Table 8. Pin Function Description
Pin No.
1
2
3
4
5
6
7
8
9, 11, 14, 15
10
12
13
16
Mnemonic
D1
D2
GND
1
V
DD1
RxD
RE
RTS
TxD
GND
2
DE OUT
A
B
V
DD2
Function
Transformer Driver Terminal 1.
Transformer Driver Terminal 2.
Ground, Logic Side.
Power Supply, Logic Side (3.3 V or 5 V). Decoupling capacitor to GND
1
required; capacitor value should be
between 0.01 μF and 0.1 μF.
Receiver Output Data. This output is high when (A − B) > 200 mV and low when (A − B) < −200 mV. The
output is tristated when the receiver is disabled, that is, when RE is driven high.
Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver; driving it
high disables the receiver.
Driver Enable Input. Driving this input high enables the driver; driving it low disables the driver.
Driver Input. Data to be transmitted by the driver is applied to this input.
Ground, Bus Side.
Driver Enable Status Output.
Noninverting Driver Output/Receiver Input. When the driver is disabled or V
DD1
or V
DD2
is powered down,
Pin A is put in a high impedance state to avoid overloading the bus.
Inverting Driver Output/Receiver Input. When the driver is disabled or V
DD1
or V
DD2
is powered down,
Pin B is put in a high impedance state to avoid overloading the bus.
Power Supply, Bus Side (Isolated 5 V Supply). Decoupling capacitor to GND
2
required; capacitor value
should be between 0.01 μF and 0.1 μF.
Rev. A | Page 9 of 20
AD [ ANALOG DEVICES ]
