ADM2484E
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
1
2
3
4
5
6
7
8
16
V
DD1
DD2
GND
15 GND
1
2
RxD
RE
14
13
12
11
A
B
Z
ADM2484E
TOP VIEW
(Not to Scale)
DE
TxD
NC
Y
10 NC
GND
GND
9
1
2
NC = NO CONNECT
Figure 2. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1
2
3
4
VDD1
GND1
RxD
RE
Power Supply (Logic Side). Decoupling capacitor to GND1 required; capacitor value should be between 0.01 μF and 0.1 μF.
Ground (Logic Side).
Receiver Output.
Receiver Enable Input. Active low logic input. When this pin is low, the receiver is enabled; when this pin is high, the
receiver is disabled.
5
DE
Driver Enable Input. Active high logic input. When this pin is high, the driver (transmitter) is enabled; when this pin
is low, the driver is disabled.
6
7
8
9
10
11
12
13
14
15
16
TxD
NC
GND1
GND2
NC
Y
Transmit Data.
No Connect. This pin must be left floating.
Ground (Logic Side).
Ground (Bus Side).
No Connect. This pin must be left floating.
Driver Noninverting Output.
Driver Inverting Output.
Receiver Inverting Input.
Z
B
A
GND2
VDD2
Receiver Noninverting Input.
Ground (Bus Side).
Power Supply (Bus Side). Decoupling capacitor to GND2 required; capacitor value should be between 0.01 μF and 0.1 μF.
Rev. 0 | Page 7 of 16
ADI [ ADI ]
