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ADM2484EBRWZ 参数 Datasheet PDF下载

ADM2484EBRWZ图片预览
型号: ADM2484EBRWZ
PDF下载: 下载PDF文件 查看货源
内容描述: 500 kbps的, ESD保护,半/全双工, iCoupler隔离器,隔离式RS -485收发器 [500 kbps, ESD Protected, Half-/Full-Duplex, iCoupler, Isolated RS-485 Transceiver]
分类和应用: 驱动器接口集成电路光电二极管
文件页数/大小: 16 页 / 469 K
品牌: ADI [ ADI ]
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ADM2484E  
APPLICATIONS INFORMATION  
ISOLATED POWER SUPPLY CIRCUIT  
PC BOARD LAYOUT  
The ADM2484E requires isolated power capable of 3.3 k at up  
to approximately 71 mA (this current is dependent on the data  
rate and termination resistors used) to be supplied between the  
kDD2 and the GND2 pins. A transformer driver circuit with a  
center tapped transformer and LDO can be used to generate the  
isolated 1 k supply, as shown in Figure 28. The center tapped  
transformer provides electrical isolation of the 1 k power  
supply. The primary winding of the transformer is excited with  
a pair of square waveforms that are ±80° out of phase with each  
other. A pair of Schottꢀy diodes and a smoothing capacitor are  
used to create a rectified signal from the secondary winding.  
The ADP3330 linear voltage regulator provides a regulated  
power supply to the bus-side circuitry (kDD2) of the ADM2484E.  
ISOLATION  
The ADM2484E isolated RS-481 transceiver requires no external  
interface circuitry for the logic interfaces. Power supply bypassing  
is required at the input and output supply pins (see Figure 29).  
Bypass capacitors are conveniently connected between Pin ±  
and Pin 2 for kDD± and between Pin ±1 and Pin ±6 for kDD2  
.
Best practice suggests the following:  
A capacitor value between 0.0± ꢁF and 0.± ꢁF.  
A total lead length between both ends of the capacitor and  
the input power supply pin that does not exceed 20 mm.  
Unless the ground pair on each pacꢀage side is connected  
close to the pacꢀage, consider bypassing between Pin ± and  
Pin 8 and between Pin 9 and Pin ±6.  
V
V
GND  
A
DD1  
GND  
DD2  
V
CC  
BARRIER  
1
2
RxD  
RE  
SD103C  
5V  
B
ADM2484E  
IN  
OUT  
+
DE  
Z
+
22µF  
SD  
ERR  
NR  
TRANSFORMER  
DRIVER  
10µF  
V
ADP3330  
TxD  
NC  
Y
NC  
GND  
CC  
GND  
1
2
78253  
GND  
SD103C  
DD2  
NC = NO CONNECT  
V
CC  
Figure 29. Recommended PCB Layout  
In applications involving high common-mode transients, ensure  
that board coupling across the isolation barrier is minimized.  
Furthermore, design the board layout so that any coupling that  
does occur equally affects all pins on a given component side.  
Failure to ensure this could cause voltage differentials between pins  
exceeding the absolute maximum ratings of the device, thereby  
leading to latch-up or permanent damage.  
V
V
DD1  
ADM2484E  
GND  
GND  
2
1
Figure 28. Isolated Power Supply Circuit  
Rev. 0 | Page 14 of 16