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ADM2484EBRWZ-REEL7 参数 Datasheet PDF下载

ADM2484EBRWZ-REEL7图片预览
型号: ADM2484EBRWZ-REEL7
PDF下载: 下载PDF文件 查看货源
内容描述: 500 kbps的, ESD保护,半/全双工, iCoupler隔离器,隔离式RS -485收发器 [500 kbps, ESD Protected, Half-/Full-Duplex, iCoupler, Isolated RS-485 Transceiver]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
文件页数/大小: 16 页 / 469 K
品牌: ADI [ ADI ]
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ADM2484E  
CIRCUIT DESCRIPTION  
ELECTRICAL ISOLATION  
TRUTH TABLES  
The truth tables in this section use the abbreviations shown  
in Table 9.  
In the ADM2484E, electrical isolation is implemented on the  
logic side of the interface. Therefore, the part has two main  
sections: a digital isolation section and a transceiver section  
(see Figure 21). The driver input signal, which is applied to the  
TxD pin and referenced to the logic ground (GND±), is coupled  
across an isolation barrier to appear at the transceiver section  
referenced to the isolated ground (GND2). Similarly, the  
receiver input, which is referenced to the isolated ground in the  
transceiver section, is coupled across the isolation barrier to  
appear at the RxD pin referenced to the logic ground.  
Table 9. Truth Table Abbreviations  
Letter  
Description  
H
L
High level  
Low level  
I
X
Z
Indeterminate  
Irrelevant  
High impedance (off)  
Disconnected  
NC  
iCoupler Technology  
Table 10. Transmitting  
The digital signals transmit across the isolation barrier using  
iCoupler technology. This technique uses chip scale transformer  
windings to couple the digital signals magnetically from one  
side of the barrier to the other. Digital inputs are encoded into  
waveforms that are capable of exciting the primary transformer  
winding. At the secondary winding, the induced waveforms are  
decoded into the binary value that was originally transmitted.  
Supply Status  
Inputs  
TxD  
Outputs  
VDD1  
On  
On  
On  
On  
Off  
Off  
VDD2  
On  
On  
On  
Off  
On  
Off  
DE  
H
H
L
X
L
Y
H
L
Z
Z
Z
Z
Z
L
H
L
X
X
X
X
H
Z
Z
Z
Z
Positive and negative logic transitions at the input cause narrow  
(~± ns) pulses to be sent to the decoder via the transformer. The  
decoder is bistable and is, therefore, set or reset by the pulses,  
indicating input logic transitions. In the absence of logic  
transitions at the input for more than ~± μs, a periodic set of  
refresh pulses, indicative of the correct input state, are sent to  
ensure dc correctness at the output. If the decoder receives no  
internal pulses for more than about 1 μs, then the input side is  
assumed to be unpowered or nonfunctional, in which case the  
output is forced to a default state (see Table ±0).  
X
Table 11. Receiving  
Supply Status  
Inputs  
Output  
RE  
RxD  
H
L
VDD1  
On  
On  
On  
On  
On  
On  
Off  
VDD2  
On  
On  
On  
On  
On  
Off  
Off  
A − B (V)  
> −0.03  
< −0.2  
L or NC  
L or NC  
L or NC  
L or NC  
H
−0.2 < A − B < −0.03  
I
Inputs open  
H
Z
X
X
X
V
V
DD1  
DD2  
H
L
L or NC  
L or NC  
ISOLATION  
BARRIER  
ENCODE  
ENCODE  
DECODE  
DECODE  
DECODE  
ENCODE  
DE  
Y
Z
D
TxD  
A
B
R
RxD  
RE  
DIGITAL ISOLATION  
TRANSCEIVER  
GND  
GND  
2
1
Figure 25. Digital Isolation and Transceiver Sections  
Rev. 0 | Page 12 of 16